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CIC Implementation details

Started by ChuckMcM 7 months ago2 replieslatest reply 7 months ago133 views

I'm implementing a #CIC decimation filter. I'm doing it on an microprocessor rather than in an FPGA and that means I don't "easily" get variable bit width registers. I previous posts we talked about various ways to simulate variable bit width with bit masking and sign extending. My question is this, "If I simply sign extend so that my input samples are signed 32 bit quantities, can I just ignore the bit widths?" Or conversely do the outputs of the combs still "work" as 32 bit values even though there may only be 8 - 10 significant bits? Thoughts?

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Reply by Tim WescottDecember 31, 2019

As long as the register in question has enough bits to roll over no more than once for your maximum input magnitude, then you're fine.  So you can always go with *more* bits -- just not less.

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Reply by chalilDecember 31, 2019

fully agree. as long as the register in question has enough bits as per the table (there is a script also to compute the widths) you're safe. makesure that you don't saturate the output, instead allow the value to roll over when the value exceeds the max. 

for the Integration, keep accumulating with sign extension (ignore the sign bit change). The Differentiation followed by this integration will give you the desired output with right sign!.