Hi! Does anyone know where can i download a cd for book:" Digital Signal Processing and Applications with the C6713 and C6416 DSK" by Rulph...

Hi! Does anyone know where can i download a cd for book:" Digital Signal Processing and Applications with the C6713 and C6416 DSK" by Rulph Chassaing? Every link i tried is old and it doesn't work. If someone has a cd i would be very grateful if u can send me a files for C6416 processor on the mail: Z...@gmail.com Thx _____________________________________

Dear friends, I hv DM648 from Lyrtech having 2 DDR's (128MB each)and I am working on " Hello World " example of NDK1.92. Before...

Dear friends, I hv DM648 from Lyrtech having 2 DDR's (128MB each)and I am working on " Hello World " example of NDK1.92. Before execution of code DSP loads the .outfile in DDR2.Recently my program failed to load in DDR with the error of "Data Verification Failed at 0xE00A7114". I wanted to know How DSP dumps or manages Data in DDR, Is it makes sequential allocaion (Fills one then the...

Dear all, I am using the two SPI modules on the C6747 for an EEPROM and an ADC. I need to connect a an SPI DAC as well to the DSP. The DAC...

Dear all, I am using the two SPI modules on the C6747 for an EEPROM and an ADC. I need to connect a an SPI DAC as well to the DSP. The DAC will be used very rarely as it is used to provide a coarse tune for a VCO. Is it possible to connect it to a bunch of GPIO pins and do the SPI in software using the GP timer? If anyone has done this before, could you may be give me some pointers. Th...

Hello Everyone, Does anyone know what is the interface used to connect the Virtex-5 FPGA and the the DSK6416 EMIF ? I know the connector to...

Hello Everyone, Does anyone know what is the interface used to connect the Virtex-5 FPGA and the the DSK6416 EMIF ? I know the connector to be used on the EMIF side is a Samtec TMS 140-32-S-D-LC but I have no idea about interfacing that with the Virtex-5. The no. of pins on the EMIF side and the the FPGA Virtex 5 EVM aren't the same. Thanks, -- Varun

Hi all I'm working with the OMAP-L137 EVM and only use the C6747. For evaluation purpose I need to reduce the clock frequency and measure the...

Hi all I'm working with the OMAP-L137 EVM and only use the C6747. For evaluation purpose I need to reduce the clock frequency and measure the time that my algorithm needs. Now first question: How can I reduce the clock frequency for the C6747? All I've done is I've changed "DSP speed in MHz (CLKOUT)" in the DSP/BIOS config tool. But I'm not really sure if the change I've made had any effect bec...

? Hi, ? Please explain how division takes place in Q format.Suppose we have to do 3/5.then 0.6 multiply by 2^15 in order to obtain the result...

? Hi, ? Please explain how division takes place in Q format.Suppose we have to do 3/5.then 0.6 multiply by 2^15 in order to obtain the result in Q notation and convert the result in to hex. Is it that much simple. or in another scenario how do we implement 45/8.Is it 45 <

I?m using SEED-DEC6713 developing board (TMS320C6713) to control an A/D chip and two D/A chips through a FPGA (Actel ProAsic3 A3p250). And the...

I?m using SEED-DEC6713 developing board (TMS320C6713) to control an A/D chip and two D/A chips through a FPGA (Actel ProAsic3 A3p250). And the FPGA is connected with DSP through EMIF interface. The detailed processes of A/D and D/A are controlled by FPGA, DSP only needs to tell FPGA when to run A/D or D/A. This work has been helped by Jeff Brower in this forum last summer . We use 3 address lin

Dear Friends, how to understand arch of TMS320C6713. I am very good at C. please guide me or provide me any good links where i can enrich my...

Dear Friends, how to understand arch of TMS320C6713. I am very good at C. please guide me or provide me any good links where i can enrich my knowlede on this. Thanks, Ramana _____________________________________

Hi all, I am a student and a beginner in DSP programming. This is my first post there. I am working on the DSK 6455 board in loop back mode...

Hi all, I am a student and a beginner in DSP programming. This is my first post there. I am working on the DSK 6455 board in loop back mode (without mezzanine) using CCS 3.2 version. I am trying to generate an interrupt at the end of an SRIO transfer. I read a lot of topics in different forum about SRIO and I also read a lot of data sheets (TMS320C6455, SRIO User's guide, Chip Support Libr...

Hi Guys, I have been stuck with this FFT stuff since long and still I am unable to verify the result. I am simply using dsk_app.c project...

Hi Guys, I have been stuck with this FFT stuff since long and still I am unable to verify the result. I am simply using dsk_app.c project for C6713 board and implementing DSPLIB function DSPF_sp_cfftr2_dit to compute 1024 point FFT over 1024 complex pairs of input. I am going to explain over all steps which has been a part of my implementation. Please have a look if I am wrong any w...