Front-end Hardware Engineer H/W modeling, synthesis, verification, prototyping and implementation Project management and documentation Setting up verification and regression suite PLDs (Xilinx FPGAs and CPLDs) ASIC (0.35um, 180nm, 130nm, and 40nm CMOS technologies) (SOI 140nm) Specialties: DSP: ------- Filters - FIR, IIR, CIC Synthesizers - NCO, DDS, ADPLL

Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization

AHMED SHAHEIN March 1, 20176 comments

During my research on digital FIR decimation filters I have been developing various Matlab scripts and functions. In which I have decided later on to consolidate it in a form of a toolbox. I have developed this toolbox to assist and automate the process of designing the multi-stage decimation filter(s). The toolbox is published as an open-source at the MathWorks web-site. My dissertation is open for public online as well. The toolbox has a wide set of examples to guide the user...


Seeking SystemC DSP Library!

New thread started 1 year ago
Hi All,Can anyone recommend a C++ library that I can rely on for DSP development using SystemC? I have used IT++ package for a while but I see the latest update...
Thanks a lot for the remark, I will definitely look into it and get back to you.It is already has a standard test-bench loading stimuli and response files (generates...
I am delighted to share with my passion in DSP by releasing the DSP-RTL-Library or (DRL) on GitHub. The library provides various standard DSP components such as;...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/27/2019)
Dear Kaz,Thank you very much for the clarification, sorry for my delay in reply. I had an issue with my notebook and I didn't have internet access. Anyway ...This...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/27/2019)
Dear Rick,I am sorry for my delay in reply, my laptop crashed and I had to reinstall everything from scratch.Anyway, regarding "DFT power samples to use in computing...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/22/2019)
Dear Kaz,Many thanks for your reply.I totally agree with you that the SNR is not the noise floor. However, I think we can deduce the SNR including quantization noise...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/21/2019)
Dear MichaelRWMany thanks for your kind correspondence.I have made the first change, but I replaced the denominator by NFFT, to be:sig_r_dft       = abs(fft(sig_r,...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/21/2019)
Thanks a lot. Can’t wait for your remarks. Regards

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/21/2019)
...

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/21/2019)
Not a must, so I intentionally choose some frequencies which are not exactly located at a f_bin.

Re: Estimating SNR in the Frequency Domain

Reply posted 2 years ago (03/21/2019)
Dear Slartibartfast,Many thanks for your reply.I have the 3rd edition of the book and the Appendix is about statistics.I have tried with and without windowing, that...

Estimating SNR in the Frequency Domain

New thread started 2 years ago
Dear All,I am trying to estimate the SNR from the signal spectrum. I have implemented the algorithm presented in "Under standing digital signal processing" by R....

Re: C++ Package for DSP

Reply posted 2 years ago (11/19/2018)
Dear Jeff,Thank you very much for the insights. C code shall be sufficient for me as well. Once again, thanks.Regards.

Re: C++ Package for DSP

Reply posted 2 years ago (11/18/2018)
Thanks for your reply. Main application is Audio and Radios.Re

C++ Package for DSP

New thread started 2 years ago
Dear All,I am looking for a mature stable C++ package/library/class for DSP. I used IT++ regularly, however, I am struggling to get compiled over the latest Ubuntu....

Re: Learning FPGA

Reply posted 2 years ago (09/23/2018)
Hello everyone,I would like to add this topic to the list: "FPGA offloading using OpenCL".It is very demanding and challenging topic. By offloading, I mean offload...

Re: Interpolated FIR filter group delay

Reply posted 2 years ago (05/18/2018)
Try the Matlab toolbox called MSDTOOLBOX. It is available as an open source on MathWorks

Re: New DSP FAQ Section - please suggest topics

Reply posted 3 years ago (10/27/2017)
Efficient usage/understanding of DFT/FFT algorithms. It seems to be trivial but once you really understand it then you can use it efficiently. As an example, the...
Many hanks for sharing these insights Rick, appreciated.Regards.

Re: Optimal Filter lineup selection

Reply posted 3 years ago (05/17/2017)
Hi Srid,May be you can try out the following toolbox.http://nl.mathworks.com/matlabcentral/fileexchange/46250-msd-toolboxI got the following graph based on your...

Re: Can we paralleize the integrator stage of CIC?

Reply posted 4 years ago (04/18/2017)
Hi Krishna,I hope I am not too late.There is a publication by Serigne Mbaye Fallo Dia entitled by "A Very High Speed and Efficient CIC Decimation Filter Core"...
Hi Andrew,Very interesting idea, I am looking forward to see the results.Just some remarks, you presented a transposed FIT filter. Please, keep in mind that this...
Hi Andrew,I just forgot to mention something in my previous reply. Matlab has an option within the FDATOOL called "Maximize Dynamic Range" which is available at...
Hi Andrew,On the one hand, I believe that the dynamic range is dictated by the input signal mainly, since the filter itself "ideally speaking" has a gain of 1. The...
Hi Niptoz, I hope that I am not too late to reply to your thread. I believe that you already got your answer from the replies below, I will just try to emphasize...
By looking into the DFT equation: $$X[m] = \sum_{n=0}^{N-1} x[n] e^{-j2\pi m \frac{n}{N}}$$ where N is the number of input samples, and m is the frequency bins. Let's...

Re: Interactive digital filter design

Reply posted 4 years ago (01/31/2017)
I am aware of a free Matlab toolbox for decimation filter design. Would that be helpful?!

Re: Interactive digital filter design

Reply posted 4 years ago (01/31/2017)
I would say reduce the filter order manually.

Re: Interactive digital filter design

Reply posted 4 years ago (01/30/2017)
Thanka lot for this valuable feedback. It is indeed a very useful article and tool as well.

Interactive digital filter design

New thread started 4 years ago
I would like to share with all of you this online interactive tool for digital filter design. It is impressive and it is free. You can understand the effect of each...

Re: down conversion vs de-modulation

Reply posted 4 years ago (11/19/2016)
Hi Sharan,Modulation is how you encode the data into the carrier. The most common modulation schemes are AM, FM, and PM. For the amplitude modulation (AM) you alter...

Re: A digital filter question

Reply posted 4 years ago (07/03/2016)
Hi,At first glance it reminds me with Sigma-Delta Modulator (SDM) loop filter. The SDM loop is the same for both low-pass (LP) and ban-pass (BP) modulators. The...

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