Hi: I have a question to ask,that is how to enable and disable the interrupt in C environment on the DSK(CCS DSK C5000 1.22).I did...

Hi: I have a question to ask,that is how to enable and disable the interrupt in C environment on the DSK(CCS DSK C5000 1.22).I did as follows: #include #include #include #include void main (void)

Hi All ! I connected the McBSP 2 to PCM3002 codec (via CPLD). I also configured the codec by its control registers (via...

Hi All ! I connected the McBSP 2 to PCM3002 codec (via CPLD). I also configured the codec by its control registers (via CPLD). I also configured the McBSP2 configurations. I set the IMR to 0x40. INTM=0; I"m recording from microphone and I

Vijay- > I work on 5402 dsp and face a strange problem in CCS(ver 3.1). That > was a old project which never used interrupts. Both C and asm...

Vijay- > I work on 5402 dsp and face a strange problem in CCS(ver 3.1). That > was a old project which never used interrupts. Both C and asm files > are there. C for main\algorithm\logic and asm for low level drivers. > No interupt was used in that project. > > Now i want to add a timer interrupt and came to know [thru Simulator] > that when a C funtion is called with parameters, CCS use

I am currently working on the C54CST version of the DSP and am having issues with configuring a DMA channel. What I am trying to do is...

I am currently working on the C54CST version of the DSP and am having issues with configuring a DMA channel. What I am trying to do is capture(recieve) the DATA coming in on MCBSP 0 and just simply store the data in memory to read it later (basically I am testing part of the functionality of the DMA). MCBSP 0 is connected to an ST-BUS device (TP3071 CODEC) and the clock and frame sync are

Hi I am using "External Interrupt 3" as a DMA synchronization event in a C5416 DSP. The source and destination addresses are in...

Hi I am using "External Interrupt 3" as a DMA synchronization event in a C5416 DSP. The source and destination addresses are in internal data memory and I/O space respectively. The problem is that the first event initiates element transfers and the DMA channel

Hi, I'm porting C54 code on C55 simulator and below is an example of where I'm having pbs. XC #2, UNC ; prevent interrupt...

Hi, I'm porting C54 code on C55 simulator and below is an example of where I'm having pbs. XC #2, UNC ; prevent interrupt following STLM STLM A, SP SSBX SXM The above code (XC instr)causes the C55 simulator to crash. Can somebody please tell me how to

Dear all I have a stbus controller unit program which uses MCBSP0 port of the TMS320C5416 processor. now I use the same code for MCBSP1 but I...

Dear all I have a stbus controller unit program which uses MCBSP0 port of the TMS320C5416 processor. now I use the same code for MCBSP1 but I got a lot of interrupts. interrupt vector assignment of MCBSP1 is done correctly, but the same code doesn't work for it. is there any difference between MCBSP0 and 1. what changes I must do for it to work properly. Regards Mehrdad OMAP35x EVM jump...

If there are two interrupt conditions (i.e. a Rcv FIFO full and a Rcv FIFO empty), will you get two separate interrupts? TIA, ...

If there are two interrupt conditions (i.e. a Rcv FIFO full and a Rcv FIFO empty), will you get two separate interrupts? TIA, Carl Chipman Nomadics, Inc. http://www.nomadics.com

I'm working on using McBSP1 on a 5416 in clock stop mode as a SPI master. I have successfully set it up so that it will transmit a...

I'm working on using McBSP1 on a 5416 in clock stop mode as a SPI master. I have successfully set it up so that it will transmit a block of bytes using DMA #2, and generate an interrupt when the block is finished. Now I'm trying to use 2 DMA channels, one for transmit (to keep

Good day. Say DMA channel 2 is configured to do a block transfer of one frame with 256 elements. When data is received via...

Good day. Say DMA channel 2 is configured to do a block transfer of one frame with 256 elements. When data is received via MsBSP1 (DRR11), REVT will caused a DMA channel 2 interrupt. Now, my understanding till now is that DMA will collect 256 data and send all 256 data in a bl

Hello all, '5416 device. Using ABU mode, is there any way of determining which half of the buffer the DMA is currently...

Hello all, '5416 device. Using ABU mode, is there any way of determining which half of the buffer the DMA is currently writing (in other words which half of the buffer was just filled and generated the half or full buffer interrupt? We can of course u

Hi all, what do you think on the following synchronisation problem: - two DSP/BIOS task objects (TSK_A and TSK_B) have the same...

Hi all, what do you think on the following synchronisation problem: - two DSP/BIOS task objects (TSK_A and TSK_B) have the same priority (e.g. Priority 1) - TSK_A is running (its execution state: TSK_RUNNING) - TSK_B is ready (its execution state: TSK_READY) - interrupt o

Hi everyone, I am working on DSK5416 and CCS. I'm doing real-time using DMA and McBSP to communicate with the codec. I'm working with 16...

Hi everyone, I am working on DSK5416 and CCS. I'm doing real-time using DMA and McBSP to communicate with the codec. I'm working with 16 bits words and with DSP/BIOS configuration. I would like to know if the problem that I have is coming from data alignment. After interruption (full buffer: 1024 words of 16 bits) I use the following function: Interrupt function(){ int i=0,maxisync,maxica...

Good day. 1)Just like to find out whether anyone try to hand code in assembly for C5402 DSK codec example? examples in DSK are...

Good day. 1)Just like to find out whether anyone try to hand code in assembly for C5402 DSK codec example? examples in DSK are C coded and clueless about the memory mapping, interrupt setting etc. 2) Tried to implement asm code for codec... setup McBSP1 and DMA ch

Hi All INT0 works fine, all other interrupts don't. I'm sure the configuration is correct (not much there to check, just IMR) ...

Hi All INT0 works fine, all other interrupts don't. I'm sure the configuration is correct (not much there to check, just IMR) Any ideas? Thanks in advance

use CSL function DMA_RGETH(hDma2, DMDST). it returns the next dst address for DMA transfer. > > > > Hello all, > >...

use CSL function DMA_RGETH(hDma2, DMDST). it returns the next dst address for DMA transfer. > > > > Hello all, > > '5416 device. > > Using ABU mode, is there any way of determining which half of the > buffer the DMA is currently writing (in other words which half of the > buffer was just filled and generated the half or full buffer > interrupt? > > We can of c

Hi, ------------------------------------------------------- My gel file has below options  #define PMST_VAL  0x0128u #define...

Hi, ------------------------------------------------------- My gel file has below options  #define PMST_VAL  0x0128u #define SWWSR_VAL  0x8e38u Also I am taking care with application ---------------------------------------------------------------------- my cmd file has     PAGE 0: EPROG: 

CPLD register controls INT1. ----- Original Message ----- From: Georgios Chatzigeorgiou

CPLD register controls INT1. ----- Original Message ----- From: Georgios Chatzigeorgiou

Hi all,   I am using a C5402 and I want to execute Brint1 interrupt.  My linker generate the following code:   ...

Hi all,   I am using a C5402 and I want to execute Brint1 interrupt.  My linker generate the following code:   0x0000E0:INT3 0x0000E0:0xF273  0X00E0  0xF495 0xF495 0x0000E4:HPINT 0x0000E4:0xF273  0X00E4  0xF495 0x

    I have a problem with flag the INT2. If I execute the following program in s

    I have a problem with flag the INT2. If I execute the following program in s