DC Blocker

The dc blocker is an indispensable tool in digital waveguide modeling [86] and other applications.B.4 It is often needed to remove the dc component of the signal circulating in a delay-line loop. It is also often an important tool in multi-track recording, where dc components in the various tracks can add up and overflow the mix.

The dc blocker is a small recursive filter specified by the difference equation

$\displaystyle y(n) = x(n) - x(n-1) + R\, y(n-1)
$

where $ R$ is a parameter that is typically somewhere between $ 0.9$ and $ 1$ (for a 44.1 kHz sampling rate, $ R=0.995$ is good). The transfer function is

$\displaystyle H(z) = \frac{1-z^{-1}}{1-Rz^{-1}}. \protect$ (B.10)

Thus, there is a zero at dc ($ z = 1$) and a pole near dc at $ z=R$. Far away from dc, the pole and zero approximately cancel each other. (Recall the graphical method for determining frequency response magnitude described in Chapter 8.)

DC Blocker Frequency Response

Figure B.11 shows the frequency response of the dc blocker for several values of $ R$. The same plots are given over a log-frequency scale in Fig.B.12. The corresponding pole-zero diagrams are shown in Fig.B.13. As $ R$ approaches $ 1$, the notch at dc gets narrower and narrower. While this may seem ideal, there is a drawback, as shown in Fig.B.14 for the case of $ R=0.9$: The impulse response duration increases as $ R\to 1$. While the ``tail'' of the impulse response lengthens as $ R$ approaches 1, its initial magnitude decreases. At the limit, $ R=1$, the pole and zero cancel at all frequencies, the impulse response becomes an impulse, and the notch disappears.

Figure B.11: Frequency response overlays for the dc blocker defined by $ H(z) = (1-z^{-1})/(1-Rz^{-1})$ for various values of pole radius $ R$. (a) Amplitude response. (b) Phase response.
\includegraphics[width=\twidth ]{eps/dcblockerfr}

Figure B.12: Log-frequency response overlays for the dc blocker defined by $ H(z) = (1-z^{-1})/(1-Rz^{-1})$ for various values of pole radius $ R$. (a) Amplitude response. (b) Phase response.
\includegraphics[width=\twidth ]{eps/dcblockerfrlf}

Figure B.13: Pole-zero diagram overlays for the dc blocker defined by $ H(z) = (1-z^{-1})/(1-Rz^{-1})$ for various values of pole radius $ R$.
\includegraphics[width=\twidth]{eps/dcblockerpz}

Figure B.14: Impulse response of the dc blocker defined by $ H(z) = (1-z^{-1})/(1-0.9z^{-1})$.
\includegraphics[width=\twidth ]{eps/dcblockerir}

Note that the amplitude response in Fig.B.11a and Fig.B.12a exceeds 1 at half the sampling rate. This maximum gain is given by $ H(-1)=2/(1+R)$. In applications for which the gain must be bounded by 1 at all frequencies, the dc blocker may be scaled by the inverse of this maximum gain to yield

\begin{eqnarray*}
H(z) &=& g\frac{1-z^{-1}}{1-Rz^{-1}}\\
y(n) &=& g[x(n) - x(n-1)] + R\, y(n-1), \quad\hbox{where}\\
g &\isdef & \frac{1+R}{2}.
\end{eqnarray*}


DC Blocker Software Implementations

In plain C, the difference equation for the dc blocker could be written as follows:

  y = x - xm1 + 0.995 * ym1;
  xm1 = x;
  ym1 = y;
Here, x denotes the current input sample, and y denotes the current output sample. The variables xm1 and ym1 hold once-delayed input and output samples, respectively (and are typically initialized to zero). In this implementation, the pole is fixed at $ R=0.995$, which corresponds to an adaptation time-constant of approximately $ 1/(1-R) = 200$ samples. A smaller $ R$ value allows faster tracking of ``wandering dc levels'', but at the cost of greater low-frequency attenuation.

A complete C++ class implementing a dc blocking filter is included in the free, open-source Synthesis Tool Kit (STK) [15]. (See the DCBlock STK class.)

For a discussion of issues and solutions related to fixed-point implementations, see [7].


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