The Beginning of a New Chapter
After years of hesitation, Stephane Boucher and Jacob Beningo finally turned their virtual events into an in-person reality with the inaugural Signal Processing Summit and Embedded Systems Summit at the Sonesta Silicon Valley. The post captures the logistics, a last-minute travel scare during a US government shutdown, the joy of meeting speakers like Fred Harris, and practical lessons for future technical events. It closes by inviting community feedback and venue suggestions.
Simple Concepts Explained: Fixed-Point
Fixed-point is the bridge between real-world values and integer arithmetic, and this post makes that bridge tangible with a hands-on ADC-to-gain example. It walks through mapping voltages to Q-format integers, choosing gain resolution in bits, and how multiplication adds bit growth and produces quantization error. Read it to build intuition for practical fixed-point choices when implementing DSP on FPGA or ASIC.
Determination of the transfer function of passive networks with MATLAB Functions
Starting the calculation from the output makes deriving a passive network transfer function simple, and this post shows how to do it in MATLAB using a sixth-order low-pass example. The walkthrough uses tf('s') to build a symbolic H(s), extracts coefficients with tfdata, and shows numerical frequency-response plotting via freqs or direct j*omega evaluation, with code and component values to reproduce the results.
Sampling bandpass signals
Bandpass signals can be sampled at rates below the usual Nyquist limit, and this note shows how the band-limited spectrum appears in baseband after sampling. Using a simple example figure, it defines the center frequency fc = (fmax + fmin)/2 and bandwidth Δf = fmax - fmin, and highlights that choosing fs less than twice the signal's highest frequency violates the sampling theorem.
Simulink-Simulation of SSB demodulation
This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.
Are DSPs Dead ?
Jeff Brower argues that the science of digital signal processing is far from dead, but commercial DSP chips lost momentum when Texas Instruments refused to embrace server-centric AI and 5G markets. He traces how TI's embedded-only culture, halted multicore CPU roadmaps, and lack of server-class products pushed customers to GPUs and FPGAs. A comeback would demand PCIe cards, VM and container support, open-source engagement, and bold leadership.
The correct answer to the quiz of @apolin
A compact Simulink model explains why certain DFT rows behave like negative-frequency bandpass filters, using dftmtx(8) rows as impulse responses. The demo shows that a 2 kHz tone with phase 0 or pi produces identical real parts and opposite imaginary parts, making a negative-frequency interpretation unnecessary. It also illustrates how a 6 kHz tone under 8 kHz sampling aliases to 2 kHz with opposite phase, visible in PSD plots.
Take Control of Noise with Spectral Averaging
Spectral averaging turns noisy FFT outputs into repeatable, measurable spectra by trading time for noise control. This post explains the practical difference between RMS averaging, which reduces variance without changing the noise floor, and vector averaging, which can lower the noise floor but requires phase-coherent, triggered inputs. It also shows how linear and exponential weighting affect reaction time for live displays and measurement accuracy.
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.
This installment digs into practical FPGA choices and board-level issues for a low-latency, floating-point feedback controller. It compares a Cyclone V implementation against an older SHARC-based design, quantifies the tradeoff between raw DSP resources and cycle latency, and calls out Gotchas found on the BeMicro CV A9 evaluation card. Engineers get concrete prompts for where to optimize: clocking, DSP-block use, I/O standards, and algorithm partitioning.
The Beginning of a New Chapter
After years of hesitation, Stephane Boucher and Jacob Beningo finally turned their virtual events into an in-person reality with the inaugural Signal Processing Summit and Embedded Systems Summit at the Sonesta Silicon Valley. The post captures the logistics, a last-minute travel scare during a US government shutdown, the joy of meeting speakers like Fred Harris, and practical lessons for future technical events. It closes by inviting community feedback and venue suggestions.
Sampling bandpass signals
Bandpass signals can be sampled at rates below the usual Nyquist limit, and this note shows how the band-limited spectrum appears in baseband after sampling. Using a simple example figure, it defines the center frequency fc = (fmax + fmin)/2 and bandwidth Δf = fmax - fmin, and highlights that choosing fs less than twice the signal's highest frequency violates the sampling theorem.
Take Control of Noise with Spectral Averaging
Spectral averaging turns noisy FFT outputs into repeatable, measurable spectra by trading time for noise control. This post explains the practical difference between RMS averaging, which reduces variance without changing the noise floor, and vector averaging, which can lower the noise floor but requires phase-coherent, triggered inputs. It also shows how linear and exponential weighting affect reaction time for live displays and measurement accuracy.
Welcoming MANY New Bloggers!
A big influx of new voices just joined DSPRelated, and Stephane Boucher introduces the growing roster of contributors and their backgrounds. The post lists dozens of newly approved bloggers, highlights the range of DSP and embedded expertise they bring, and asks readers to leave constructive feedback on posts. It also explains why some applicants may not have been accepted yet and how to apply properly.
New Comments System (please help me test it)
DSPRelated just got a practical upgrade, Stephane Boucher has released a new comments system built from his earlier forum work. It supports drag-and-drop or Insert Image uploads, MathML, TeX and ASCIImath rendered by MathJax, syntax-highlighted code via highlight.js, and in-place editing and deletion of comments. Improved email notifications alert authors and commenters to replies, and readers are invited to post test comments and report problems.
Simulink-Simulation of SSB demodulation
This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
DSPRelated and EmbeddedRelated now on Facebook & I will be at EE Live!
Stephane Boucher announces two practical updates for DSPRelated readers. He launched Facebook pages for DSPRelated and EmbeddedRelated so members can get faster updates, and he will be attending EE Live in San Jose from March 30 to April 3 with a $100-off promo code for early registration. He also asks the community for ideas on how to make his conference coverage most useful.
Simple Concepts Explained: Fixed-Point
Fixed-point is the bridge between real-world values and integer arithmetic, and this post makes that bridge tangible with a hands-on ADC-to-gain example. It walks through mapping voltages to Q-format integers, choosing gain resolution in bits, and how multiplication adds bit growth and produces quantization error. Read it to build intuition for practical fixed-point choices when implementing DSP on FPGA or ASIC.
Determination of the transfer function of passive networks with MATLAB Functions
Starting the calculation from the output makes deriving a passive network transfer function simple, and this post shows how to do it in MATLAB using a sixth-order low-pass example. The walkthrough uses tf('s') to build a symbolic H(s), extracts coefficients with tfdata, and shows numerical frequency-response plotting via freqs or direct j*omega evaluation, with code and component values to reproduce the results.
Take Control of Noise with Spectral Averaging
Spectral averaging turns noisy FFT outputs into repeatable, measurable spectra by trading time for noise control. This post explains the practical difference between RMS averaging, which reduces variance without changing the noise floor, and vector averaging, which can lower the noise floor but requires phase-coherent, triggered inputs. It also shows how linear and exponential weighting affect reaction time for live displays and measurement accuracy.
Sampling bandpass signals
Bandpass signals can be sampled at rates below the usual Nyquist limit, and this note shows how the band-limited spectrum appears in baseband after sampling. Using a simple example figure, it defines the center frequency fc = (fmax + fmin)/2 and bandwidth Δf = fmax - fmin, and highlights that choosing fs less than twice the signal's highest frequency violates the sampling theorem.
Welcoming MANY New Bloggers!
A big influx of new voices just joined DSPRelated, and Stephane Boucher introduces the growing roster of contributors and their backgrounds. The post lists dozens of newly approved bloggers, highlights the range of DSP and embedded expertise they bring, and asks readers to leave constructive feedback on posts. It also explains why some applicants may not have been accepted yet and how to apply properly.
New Comments System (please help me test it)
DSPRelated just got a practical upgrade, Stephane Boucher has released a new comments system built from his earlier forum work. It supports drag-and-drop or Insert Image uploads, MathML, TeX and ASCIImath rendered by MathJax, syntax-highlighted code via highlight.js, and in-place editing and deletion of comments. Improved email notifications alert authors and commenters to replies, and readers are invited to post test comments and report problems.
Simple Concepts Explained: Fixed-Point
Fixed-point is the bridge between real-world values and integer arithmetic, and this post makes that bridge tangible with a hands-on ADC-to-gain example. It walks through mapping voltages to Q-format integers, choosing gain resolution in bits, and how multiplication adds bit growth and produces quantization error. Read it to build intuition for practical fixed-point choices when implementing DSP on FPGA or ASIC.
Are DSPs Dead ?
Jeff Brower argues that the science of digital signal processing is far from dead, but commercial DSP chips lost momentum when Texas Instruments refused to embrace server-centric AI and 5G markets. He traces how TI's embedded-only culture, halted multicore CPU roadmaps, and lack of server-class products pushed customers to GPUs and FPGAs. A comeback would demand PCIe cards, VM and container support, open-source engagement, and bold leadership.
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.
This installment digs into practical FPGA choices and board-level issues for a low-latency, floating-point feedback controller. It compares a Cyclone V implementation against an older SHARC-based design, quantifies the tradeoff between raw DSP resources and cycle latency, and calls out Gotchas found on the BeMicro CV A9 evaluation card. Engineers get concrete prompts for where to optimize: clocking, DSP-block use, I/O standards, and algorithm partitioning.
Collaborative Writing Experiment: Your Favorite DSP Websites
Stephane Boucher invites the DSPRelated community to a live Google Docs experiment to crowdsource the best DSP websites. After a successful run with EmbeddedRelated, he opens a shared document where members can add, edit, and curate links in real time. The post explains the simple rules, notes revision rollback protection, and asks readers to refresh and help keep the list useful and spam-free while watching it evolve.
Simulink-Simulation of SSB demodulation
This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.
