Advice on digital phase locked loop with square wave input wanted

Started by johnpote 7 years ago7 replieslatest reply 7 years ago897 views
I have the interesting project of desigining and implementing a digital phase locked loop in a micro-controller. The input is a square wave for which the absolute...

Phase locked Loop Bandwidth for second order system

Started by chess 8 years ago11 replieslatest reply 8 years ago1859 views
Hi everyone I would like to know can anyone tell me how to determine the #PLL bandwidth ? I read that it can be set to 1/10 or 1/20 of reference frequency however...

Acquisition Range of PLL

Started by avi1987 8 years ago1 replylatest reply 8 years ago943 views
How do one define acquisition range of #PLL?  What is its dependence on loop bandwidth?How acquisition range differ for discrete PLL instead of normal PLL?

Please login (on the right) if you already have an account on this platform.

Otherwise, please use this form to register (free) an join one of the largest online community for Electrical/Embedded/DSP/FPGA/ML engineers: