What I'm trying to do is use multichannel to separate out the left and right data from an AD73322L CODEC that produces a frame sync...

What I'm trying to do is use multichannel to separate out the left and right data from an AD73322L CODEC that produces a frame sync pulse on every sample. I would like to set the multichannel mode to put the first sample in one buffer and the second in another buffer but from the manual it

Hi all, I'm using VDSP++ 2.0 and have played around with the Flash Programmer that comes bundled with the EZ-Kit SHARC DSP...

Hi all, I'm using VDSP++ 2.0 and have played around with the Flash Programmer that comes bundled with the EZ-Kit SHARC DSP development board. My understanding of how the flash programming works is that the Flash Programmer plug-in cooperates/communicates with a .dxe exec

Hi DSP guru, I am programming for ADSP21061. The code was developed by other developer who left long time ago. I am trying to understand...

Hi DSP guru, I am programming for ADSP21061. The code was developed by other developer who left long time ago. I am trying to understand his code, but I don't have experience on DSP at all. The DSP is used as a slave that is listening to the command sent from the master Micro controller. These interface signals include IRQ0, dsp_data[31:0] SPR0I, etc. Accordin

Hello I'm working on SHARC EZ-Kit and I connect DAC to ADC in order to determine group delay, just by applying a pulse via...

Hello I'm working on SHARC EZ-Kit and I connect DAC to ADC in order to determine group delay, just by applying a pulse via DAC : I measure 24 samples instead of 12 specified by Analog. Does anybody can help and give me his measure to determine who is right!!

Hi everyone, i have implemented a Digtal PLL using SHARC ADSP 21060. i am reading 1 bit data from serial port 1 and tracking...

Hi everyone, i have implemented a Digtal PLL using SHARC ADSP 21060. i am reading 1 bit data from serial port 1 and tracking it continously. i have used chained DMA for the real time implemenation. basically Costas loop is implemented. It's working very fin

hello i am facing one problem regarding the sweep waves generation from the sine generator. actually the sweep waves are continous sine...

hello i am facing one problem regarding the sweep waves generation from the sine generator. actually the sweep waves are continous sine wave with varing frequencies. but the problem is when the frequency changes the amplitude also changes. i am doing asm coding on the 21365 ADSP sharc processor. please help me out from this one.

Hi All, Presently, I am working on the sharc-21364 EZ-kit and I need some info regarding the usb extender connected to it. When I start my...

Hi All, Presently, I am working on the sharc-21364 EZ-kit and I need some info regarding the usb extender connected to it. When I start my project(containing all necessary USB initializations) and after running hostapp from the PC, then only I will be able to perform the file operations. What exactly(communication) happens between the PC and EZ-kit? What the hostapp which is run fr...

Hello I need to implement UART on ADSP21363. I find EE note on Analog web site for previous Sharc, solution is based on SPORT. Does anyone...

Hello I need to implement UART on ADSP21363. I find EE note on Analog web site for previous Sharc, solution is based on SPORT. Does anyone have experience on 2136x. I also find MAX3100 chip (UART on SPI), Does anyone have experience with this chip ? Thanks in advance

Hi! Would someone provide code examples on how to simulate chained DMA transfers from Serial Port1 on ADSP-21160 whithin...

Hi! Would someone provide code examples on how to simulate chained DMA transfers from Serial Port1 on ADSP-21160 whithin VisualDSP++ 2.0 for SHARC, gathering the data in blocks of 32 samples from an exernal .dat file in floating poin format? I've tried everything from the manuals and newsgroups

I have an A/D connected to a SHARC 21061 EZ-KIT. It is connected via the DMAG2 and DMAR2 lines, so there's no address decoding. ...

I have an A/D connected to a SHARC 21061 EZ-KIT. It is connected via the DMAG2 and DMAR2 lines, so there's no address decoding. I use the TIMEXP line to start an A/D conversion. The part is a 12 bit 1 MHz converter, so the TIMEXP line fires a conversion once every 1 or 2 micro

Hi all, I'm developping an ATAPI driver for Sharc DSP (21161, 21065). I'm looking for people who have done it or have a good...

Hi all, I'm developping an ATAPI driver for Sharc DSP (21161, 21065). I'm looking for people who have done it or have a good idea to the problem that can occur (hard, soft) with 8/16 bits devices. I've done a test board based on a ADSP-21161EZ-KITLite board (DSP v

Hi fellows, recently I found a strange behavior, which I guess is a compiler error: I have a quite trivial piece of code:...

Hi fellows, recently I found a strange behavior, which I guess is a compiler error: I have a quite trivial piece of code: static float fvar; float get_var(void) { return fvar; } This function is exported via a header a

Hi I am facing a problem when writing to the SDRAM thru the SHARC, The SDRAM is connected to the Bank 2(MS2) of the DSP,...

Hi I am facing a problem when writing to the SDRAM thru the SHARC, The SDRAM is connected to the Bank 2(MS2) of the DSP, Internally the SDRAM has 4 Banks, when ever i write to one memory bank of the SDRAM it writes to all the four banks, I have checked the BA0 and BA1 address l

I'm porting some code from another platform to SHARC. I have some C source that's generated by passing a data file through a ...

I'm porting some code from another platform to SHARC. I have some C source that's generated by passing a data file through a preprocessor. The compiler for the other platform is happy to treat a file with a .tbl extension as C, but the VDSP compiler can't understand it unless

Is there some way in Visual DSP (SHARC) to tell the compiler that a global variable always lives in a specific register? I have...

Is there some way in Visual DSP (SHARC) to tell the compiler that a global variable always lives in a specific register? I have a small number of global pointers that point to something like a task state object. All data associated with a task is referenced through one of thes

Hi everybody i am working on SHARC ADSP 21060.i want to use multiple DMA channels at the same time. actually i am reading...

Hi everybody i am working on SHARC ADSP 21060.i want to use multiple DMA channels at the same time. actually i am reading data thru serial port 1 in blocks of 1ms and processing this data. after every 20 ms i need to transfer 1 bit, i get after this processing.these

Greetings, I have a piece of software fielded that violates the ADSP-2106x SHARC User's Manual stament in 3.5.1.1 "The last three...

Greetings, I have a piece of software fielded that violates the ADSP-2106x SHARC User's Manual stament in 3.5.1.1 "The last three instructions of a loop cannot be any branch; ... otherwise the loop may not execute correctly." We execute some code during boot-up and have yet to experience a problem (thousands of bootups, at cold a

Dear Sir I am using SHARC 21065L Processor, and VDSP4.0++ Simulator. My Querry is How to Declare a Circular Buffer of Array Size 25?, And How...

Dear Sir I am using SHARC 21065L Processor, and VDSP4.0++ Simulator. My Querry is How to Declare a Circular Buffer of Array Size 25?, And How to call the Buffer. with Regards Naveen S Send free SMS to your Friends on Mobile from your Yahoo! Messenger. Download Now! http://messenger.yahoo.com/download.php

hi, I am workin on Tiger sharc simulator platform (ADSP-TS101). My entire C code is not fitting into internal M0Code memory. So, I...

hi, I am workin on Tiger sharc simulator platform (ADSP-TS101). My entire C code is not fitting into internal M0Code memory. So, I loaded it to the SDRAM but then it was not able to locate the compiled code. In what way i should manage memory, for proper cross-compilation of my

Hello, I am working on a DSP project using ADSP 21065L Processor. I wish to configure extranal port DMA in Paced master...

Hello, I am working on a DSP project using ADSP 21065L Processor. I wish to configure extranal port DMA in Paced master mode for data accquision. Our application requires data to be accquired from slave device (ADC ) when ever device asserts DMARx sig