Forums Search for: SHARC
File Read on Tiger Sharc TS101
Hello, I am using TS101 processor on Transtech TS- P36N board. I am doing file io operations, which is consuming a lot of time....
Hello, I am using TS101 processor on Transtech TS- P36N board. I am doing file io operations, which is consuming a lot of time. To read a file of size 108630 words ( 720 x 576 bytes) the time taken is aprrox. 8.5 minutes. If i use setvbuf(), the time taken is 6.5
USB driver issue with 21161/ts101 evaluation boards
inHello VDSP users, I have two EZ-LITE boards, one for 21161 and the other for ts101. While working with the 21161 board, I...
Hello VDSP users, I have two EZ-LITE boards, one for 21161 and the other for ts101. While working with the 21161 board, I happened to select a tiger sharc session, so that VisualDSP IDDE tried to open the ts101 board (and failed, naturally). Since then, I cannot
external heap problems in sharc 21161
inHi All, We are having problems when we specify heap in external memory. We are using Visual DSP++ 3.0 on 21161N EZ-Kit (Rev...
Hi All, We are having problems when we specify heap in external memory. We are using Visual DSP++ 3.0 on 21161N EZ-Kit (Rev 2.2); the kernel that comes with Visual DSP++; PCI emulator (Rev 7.0.0.0). We've written a very simple application which works if we specify
illegal memory width of 8 bits...
inHi, I've got an implementation that's using 8-bit wide x 1K dual port ram for sharc to offboard async communications. ...
Hi, I've got an implementation that's using 8-bit wide x 1K dual port ram for sharc to offboard async communications. I get the following error (VDSP4.1) [Error E1500] The memory 'seg_dpram'' has got illegal memory width of 8 bits
DSP IDs reversed for AD14060 or VisualDSP?
inI'm using the AD14060 Quad SHARC (four ADSP-21060s). The DSP IDs read from the SYSYTAT registers are reversed from what is expected;...
I'm using the AD14060 Quad SHARC (four ADSP-21060s). The DSP IDs read from the SYSYTAT registers are reversed from what is expected; In VisualDSP++ 2.0, DSP_A reports an ID of 4, DSP_B's ID is 3, DSP_C's ID is 2 and DSP_D's ID is 1. This leads to the LDF file having the incorrect MPMEMORY
AW: SPORT DMA Chaining for pingpong buffer
First, have a look at the tcb adressing -- the chain pointer must adress the II register value of the next tcb! Second, tcb...
First, have a look at the tcb adressing -- the chain pointer must adress the II register value of the next tcb! Second, tcb layout is in reverse order compared to the register layout; Third, did you add the chain pointer offset required by most sharc dsps? Last, did you enable
how to write architecture file?
inHello Everybody, Could someone plz tell me how to write architecture file for ADSP-21061 sharc ezkit-lite. What is the...
Hello Everybody, Could someone plz tell me how to write architecture file for ADSP-21061 sharc ezkit-lite. What is the difference between linker description file (.ldf) used in vdsp++ and ezkit.ach file that come along with EZKIT-LITE software? your help wi
AC97 CODEC to SHARC (ADSP-21160M <=> AD1881A)
Hello, I hope at least one of you could me help to setup the ADSP-21160M to an AD1881A attached to SPORT1 for DMA of only data,...
Hello, I hope at least one of you could me help to setup the ADSP-21160M to an AD1881A attached to SPORT1 for DMA of only data, I mean, just the PCM audio samples trhough the DMA engine, without the "side information" like the TAG PHASE and COMMAND ADDRESS and STATUS
Problem in ISR - 21160M
Hai everybody, ---> I am using Sharc-21160M processor in multi processor environment. ---> I am doing inter processor communication through...
Hai everybody, ---> I am using Sharc-21160M processor in multi processor environment. ---> I am doing inter processor communication through link ports. ---> interruptf function is been used to map my function to the ISR. My problem is I am getting into ISR(in Tx side) once I transmit the data from one processor to the other. But the processor is hanging, since the control is not
Problem in VDSP4.0 for SHARC
Dear Sir/Madam, We are presently using ADSP-21065L processor, VDSP++ 4.0. While simulating the project attached with this mail, we are facing...
Dear Sir/Madam, We are presently using ADSP-21065L processor, VDSP++ 4.0. While simulating the project attached with this mail, we are facing a problem. There is funtion (ADCP_FilterSample in testcali.c) to perform the FIR filter for 6 differenet buffers, in that for R phase voltage (function called for the first time), R phase current (function called for the second time), B phase voltag...
Initialized variables in program memory
inHi all, I am using VisualDSP++ 3.0 with an Apex-ICE and a 21161N Sharc dsp. I am having trouble initializing an array of filter coefficients in...
Hi all, I am using VisualDSP++ 3.0 with an Apex-ICE and a 21161N Sharc dsp. I am having trouble initializing an array of filter coefficients in an asm file if the array is placed in program memory. This is how I declared it: .segment /pm seg_pmco; .VAR fir_coefs[NUM_FIR_TAPS] = {0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.0625, 0.062...
SPORT in TDM mode
Hi, I am new to SHARC and I am using ADSP-21369. I was wondering if anyone could provide some example codes for SPORT in TDM mode for...
Hi, I am new to SHARC and I am using ADSP-21369. I was wondering if anyone could provide some example codes for SPORT in TDM mode for ADSP-21369. Thanks, sm
Run-Time Error Detection & Analysis Tool
Hi, I'm using VisualDSP++5.0 and using a SHARC processor. Currently, I'm in the software testing stage. I've already completed my static...
Hi, I'm using VisualDSP++5.0 and using a SHARC processor. Currently, I'm in the software testing stage. I've already completed my static code analysis using a 3rd party software. I'm looking for suitable run-time error detection tool, do you have any recommendation? Thank you
21161 ezkit and 96kHz sampling
Hi! Did anyone figure out how to operate the AD1836 codec on the 21161ezlite at 96kHz? I'm a little confused. In...
Hi! Did anyone figure out how to operate the AD1836 codec on the 21161ezlite at 96kHz? I'm a little confused. In Application Note AN-AD1836-21161 "Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 Multichannel codec" is written (on page 10) :
ogg vorbis implementation
Hi, I am a final year student in Electronics doing a project on ogg vorbis implementation on sharc ADSP 21364. Here are a few issues I needed...
Hi, I am a final year student in Electronics doing a project on ogg vorbis implementation on sharc ADSP 21364. Here are a few issues I needed some light thrown upon I have used the source code from xiph.org. I am doing a floating point implementation. There is a problem with heaps. The code uses a lot of dynamic memory. I have used multiple heaps and expanded the heap size to maximum possibl...
FFT result problem
inHello, I have Run 32 bit 1024 point Complex FFT on a Tiger Sharc. The DSP runs fft excalty as given in application note. Now i...
Hello, I have Run 32 bit 1024 point Complex FFT on a Tiger Sharc. The DSP runs fft excalty as given in application note. Now i want to plot these results in real time using Streams in Visual DSP++ and using Visual DSP++ built in plot functions. Now Lets say i have Two tones 1200HZ an
How to use the LDR file to boot my system ?
Hello All, I am using the SHARC-21065L to develop my system .But I have a problem with the boot sequence with host booting...
Hello All, I am using the SHARC-21065L to develop my system .But I have a problem with the boot sequence with host booting ,does someone have the experience of designing the hardware and software for host booting ? How do I use the LDR file to boot my system ?If you giv
Reg-Sports
inHi Everybody, I am Sreedhar, i am a new member of this group. I am reading sharc 21266 hardware reference manual. ...
Hi Everybody, I am Sreedhar, i am a new member of this group. I am reading sharc 21266 hardware reference manual. I am reading serial ports chapter. In the data word format section. it is given as when DIFS = 1 and SPTRA
question about real time implementation of Melp
inHi, I am working on real time implementation of MELP algorithm on 2106x SHARC dsps. I have converted half of C functions of MELP...
Hi, I am working on real time implementation of MELP algorithm on 2106x SHARC dsps. I have converted half of C functions of MELP (obtained from DOD). I have a problem: I want to convert MSVQ_ENC function ( this function is used for multi stage vector quantization ) and I estimate tha
SHARC : data receiver (ADC-DAC) or transfer problem
inHi all, I am developing a project based on Talkthru example for ADSP-214xx (21489 AD1939 C Block-Based Talkthru 48 or 96 kHz). While debugging...
Hi all, I am developing a project based on Talkthru example for ADSP-214xx (21489 AD1939 C Block-Based Talkthru 48 or 96 kHz). While debugging the project I noticed strange behavior with Codecs Input/Output. The problem occurs if you HALT a running program on DSP and than restart it without loading / reloading / rebuilding the project. While looking for the problem, I also tested the default Ta...