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intermittent EDMA problems on 6211

Started by Calvert, Paul in TMS320c6x21 years ago

All, I am using the EDMA to output waveforms to a 4 channel D/A. I use Timer 1 to synchronize the outputs and initiate each...

All, I am using the EDMA to output waveforms to a 4 channel D/A. I use Timer 1 to synchronize the outputs and initiate each transfer. I would NEVER have gotten this far without the help of my good friend Maur Gaganjot of TI and he actually came up with the scheme I am trying t


Re: EDMA Problem revisited

Started by Andreas Falter in TMS320c6x19 years ago

Hi Mayank, first of all, which target processor do you use? I'm using a C6416, maybe the configuration for C62x and C67x...

Hi Mayank, first of all, which target processor do you use? I'm using a C6416, maybe the configuration for C62x and C67x processors is different from mine, but I hope this will help you though: There are two different types of starting an EDMA transfer, event tr


why EDMA no speed improvement

Started by Yong Yang in TMS320c6x20 years ago 2 replies

Hi, all   I compared EDMA fast copy DAT_copy() with C function memcpy() in my program, but there is no difference in speed....

Hi, all   I compared EDMA fast copy DAT_copy() with C function memcpy() in my program, but there is no difference in speed. Why does EDMA have no improvement of speed?   Thank you   Yong


McBSP EDMA synchronisation issues

Started by Ramkumar R in TMS320c6x18 years ago

Hi I'm working on the implementation of a TDM driver with 6416 processor. The McBSP is used to transfer data through EDMA. The clock for...

Hi I'm working on the implementation of a TDM driver with 6416 processor. The McBSP is used to transfer data through EDMA. The clock for McBSP is provided by an external device. Due to some lack in synchronisation between McBSP and EDMA, the data appears shifted and appears in the next channel. The data for channel 0 is in channel 1, data for channel 1 is in channel 2 and so on. A ...


edma $ mcbsp configuration and sequence problems

Started by fx-7...@163.com in TMS320c6x14 years ago 7 replies

hello everyone! I'm now doing a project focus on transmission of data thru mcbsp that controlled by edma.the project is based on the...

hello everyone! I'm now doing a project focus on transmission of data thru mcbsp that controlled by edma.the project is based on the 'app_dsk' demo.in the demo project,it uses mcbsp2 in both receiving and transmitting,in my project I just use mcbsp0 to transmit,no receiving,the data for transmission is prepared in the program.I just configure the registers of mcbsp0 and edma as required,mcbsp...


What's the difference between csl_edma.h and edma.h

Started by Anonymous in TMS320c6x22 years ago 3 replies

Hi! How can I get the csl.h ,csl_edma.h,csl_mcbsp.h,and edma.h etc.? Thanks!

Hi! How can I get the csl.h ,csl_edma.h,csl_mcbsp.h,and edma.h etc.? Thanks!


mismatch between the EDMA and McBSP element length

Started by k seshu babu in TMS320c6x21 years ago 1 reply

hi all I am using DSK6711 I got a problem If the EDMA is configured to tranfer 16-bit elements how will the McBSP handle ...

hi all I am using DSK6711 I got a problem If the EDMA is configured to tranfer 16-bit elements how will the McBSP handle if it is configured to tranfer only 8-bit elements. I mean how will the mismatch between the EDMA and McBSP element length handled DXR is 32-bi


C6713B EDMA/IRQ cache problem

Started by Bernhard 'Gustl' Bauer in TMS320c6x16 years ago 5 replies

Hi, I use EDMA to transfer data from a int. buffer to ext. RAM and vice versa. Pointer from a IRQ routine have access to the int. buffer too....

Hi, I use EDMA to transfer data from a int. buffer to ext. RAM and vice versa. Pointer from a IRQ routine have access to the int. buffer too. When EDMA ptr and IRQ ptr are 16 samples (512 bit) apart all works fine. Unfortunately with 16 samples the buffer is to small for all pointers. With 8 samples (256 bit) apart I get wrong data. The only reason for those errors I can think of is ...


C6713 simulator Error

Started by sank...@hotmail.com in TMS320c6x16 years ago

Hi everyone, System: C6713 Device cycle accurate simulator ( CCS3.3) -> Simulates C6713 processor -> Supports L1P, L1D, L2 Cache, EDMA,...

Hi everyone, System: C6713 Device cycle accurate simulator ( CCS3.3) -> Simulates C6713 processor -> Supports L1P, L1D, L2 Cache, EDMA, QDMA, Timer(2), EMIF interfacing with async and SDRAM Memory models, McBSP(2), interrupt selector. My system: EDMA configured to acquire data in ping pong buffers mapped in external memory. A timer event is used to produce EDMA interrupt. In one sec ping


EDMA Configure-Revisited

Started by mayank agarwal in TMS320c6x19 years ago

Dear All, i am trying to configure EDMA to transfer data from one memory location to another. I am having doubts ...

Dear All, i am trying to configure EDMA to transfer data from one memory location to another. I am having doubts 1.How to determine which channel is most suitable for configuring,does it depend on synchronization event,i wa


EDMA problem on DM642.

Started by TM in TMS320c6x16 years ago 1 reply

Hi, I have a custom DM642 board. I am using the Video Port 2 for Video In. McASP0 for audio and McBSP1 configured as UART. 1).McASP0 +EDMA ( Ch...

Hi, I have a custom DM642 board. I am using the Video Port 2 for Video In. McASP0 for audio and McBSP1 configured as UART. 1).McASP0 +EDMA ( Ch 12 , Ch 13)is configured for audio transmit and receive. The code has been taken from the "echo" Project under the evmDM642 examples for audio and modified. 2). McBSP1 + EDMA( Ch14 , Ch15) is configured as UART for RS485 TX & RX. The problem ...


HPI transfer control register

Started by Fredrik Hugosson in TMS320c6x18 years ago

Hi! In spru578c chapter 8.4 there is a description of how to change the HPI EDMA priority. The description is rather involved and for a...

Hi! In spru578c chapter 8.4 there is a description of how to change the HPI EDMA priority. The description is rather involved and for a newbie at TI EDMA not that easy to implement. There really should be a CSL function for this. Is there anyone who has the C-code for doing this? Thanks in advance. /HUGO.


EDMA problem

Started by T a h i r in TMS320c6x19 years ago

Hi! I m working on TI's C6416. I have a problem with EDMA. I want to know how much channels are general purpose and how i can configure...

Hi! I m working on TI's C6416. I have a problem with EDMA. I want to know how much channels are general purpose and how i can configure to recieve/transmit data using channel#1,2,3.... Thanks ________________________________________________________________________ Yahoo! Messenger - Communicate instantly..."Ping" your fr


EDMA throughput

Started by akalya in TMS320c6x22 years ago 1 reply

Hello ! Is there some TI resource describing the throughput of EDMA transfers ? It would be great if there is a definitive...

Hello ! Is there some TI resource describing the throughput of EDMA transfers ? It would be great if there is a definitive way to choose between two types of transfers, to get the same effect. For e.g. when I tried a 2D to 1D transfer to move two columns of 16-


When should an EDMA terminate?

Started by colin_e2002 in TMS320c6x21 years ago

Dear All, I am new to DSPs, so this might seem like an elementary question to some! I am developing on a C6711 DSP, using code...

Dear All, I am new to DSPs, so this might seem like an elementary question to some! I am developing on a C6711 DSP, using code composer (v2.20) and making use of the CSL. I have created a simple EDMA which copies a 1D array to a single memory location (an LED bank


L2 config

Started by akalya in TMS320c6x22 years ago 1 reply

Hi all ! I am having trouble using the L2 config register in the C6711 DSK. I try to EDMA data from SDRAM into L2, and do...

Hi all ! I am having trouble using the L2 config register in the C6711 DSK. I try to EDMA data from SDRAM into L2, and do some processing on it. If I configure 16K of L2 to be Cache, and enable caching for the SDRAM (MAR0 = 1), the EDMA does not do the correct tr


EDMA interrupt by the RTDX

Started by silvera_tristan in TMS320c6x20 years ago

Hi all, I want to interrupt the EDMA each time a certain buffer is filled by the RTDX: 1) is there an event for that? 2) if...

Hi all, I want to interrupt the EDMA each time a certain buffer is filled by the RTDX: 1) is there an event for that? 2) if not and it has to be done manually, does the command EDMA_setChannel() triggers the edmaHwi function? because, I put some test lines in the beginnin


EDMA problem.

Started by ugieugie77 in TMS320c6x21 years ago 1 reply

Hi all Why 'internal to internal edma transfer' is more slow then 'external to external'? Im working with TMS6415-500MHz. ...

Hi all Why 'internal to internal edma transfer' is more slow then 'external to external'? Im working with TMS6415-500MHz. Thank you very much in advance, Regards James


Edma transfer

Started by anis bhy in TMS320c6x18 years ago

Hi folks, I'm trying to use edma transfer and the result is that first 16 bytes of the length are not changed.Alignement?My source and...

Hi folks, I'm trying to use edma transfer and the result is that first 16 bytes of the length are not changed.Alignement?My source and destination adresses are multiple even of 16 !!!! Thanks for help. Anis --------------------------------- Nouveau : t?l?phonez moins cher avec Yahoo! Messenger ! D?couvez les tarifs exceptionnels pour appeler la France et l'international.T?l?chargez l...


TMS320C6713 EDMA Problem

Started by avai...@gmail.com in TMS320c6x14 years ago 1 reply

I am using TMS320C6713 DSP in my project. 1) I want to write single fix byte periodically to EMIF CE3 by using timer interrupt. 2) I want to...

I am using TMS320C6713 DSP in my project. 1) I want to write single fix byte periodically to EMIF CE3 by using timer interrupt. 2) I want to read single fix byte from EMIF CE3 at external gpio interrupt. Read and write strobe widths are 600nsec. i think processor stalls at read and write. In order to make procedure more efficient i tried to use EDMA because EDMA can read and write from ...