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A Recipe for a Common Logarithm Table

Cedron Dawg ● April 29, 2017
Introduction

This is an article that is a digression from trying to give a better understanding to the Discrete Fourier Transform (DFT).

A method for building a table of Base 10 Logarithms, also known as Common Logarithms, is featured using math that can be done with paper and pencil. The reader is assumed to have some familiarity with logarithm functions. This material has no dependency on the material in my previous blog articles.

If you were ever curious about how...

Sinusoidal Frequency Estimation Based on Time-Domain Samples

Rick Lyons ● April 20, 2017●19 comments

The topic of estimating a noise-free real or complex sinusoid's frequency, based on fast Fourier transform (FFT) samples, has been presented in recent blogs here on dsprelated.com. For completeness, it's worth knowing that simple frequency estimation algorithms exist that do not require FFTs to be performed . Below I present three frequency estimation algorithms that use time-domain samples, and illustrate a very important principle regarding so called "exact"...

Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT

Cedron Dawg ● April 13, 2017●1 comment
Introduction

This is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by deriving exact formulas for the frequency of a complex tone in a DFT. This time it is three bin versions. Although the problem is similar to the two bin version in my previous blog article "A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT"[1], a slightly different approach is taken using linear algebra concepts. Because of an extra degree of freedom...

A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT

Cedron Dawg ● March 20, 2017●9 comments
Introduction

This is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by deriving an exact formula for the frequency of a complex tone in a DFT. It is basically a parallel treatment to the real case given in Exact Frequency Formula for a Pure Real Tone in a DFT. Since a real signal is the sum of two complex signals, the frequency formula for a single complex tone signal is a lot less complicated than for the real case.

Theoretical...

DFT Bin Value Formulas for Pure Complex Tones

Cedron Dawg ● March 17, 2017
Introduction

This is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by deriving an analytical formula for the DFT of pure complex tones and an alternative variation. It is basically a parallel treatment to the real case given in DFT Bin Value Formulas for Pure Real Tones. In order to understand how a multiple tone signal acts in a DFT it is necessary to first understand how a single pure tone acts. Since a DFT is a linear transform, the...

New Video: Parametric Oscillations

Tim Wescott ● January 4, 2017

I just posted this last night.  It's kinda off-topic from the mission of the channel, but I realized that it had been months since I'd posted a video, and having an excuse to build on helped keep me on track.

Some Thoughts on Sampling

Qasim Chaudhari ● November 15, 2016●2 comments

Some time ago, I came across an interesting problem. In the explanation of sampling process, a representation of impulse sampling shown in Figure 1 below is illustrated in almost every textbook on DSP and communications. The question is: how is it possible that during sampling, the frequency axis gets scaled by $1/T_s$ -- a very large number? For an ADC operating at 10 MHz for example, the amplitude of the desired spectrum and spectral replicas is $10^7$! I thought that there must be...

Fibonacci trick

Tim Wescott ● October 10, 2016●4 comments

I'm working on a video, tying the Fibonacci sequence into the general subject of difference equations.

Here's a fun trick: take any two consecutive numbers in the Fibonacci sequence, say 34 and 55.  Now negate one and use them as the seed for the Fibonacci sequence, larger magnitude first, i.e.

$-55, 34, \cdots$

Carry it out, and you'll eventually get the Fibonacci sequence, or it's negative:

$-55, 34, -21, 13, -8, 5, -3, 2, -1, 1, 0, 1, 1 \cdots$

This is NOT a general property of difference...

An s-Plane to z-Plane Mapping Example

Rick Lyons ● September 24, 2016●10 comments

While surfing around the Internet recently I encountered the 's-plane to z-plane mapping' diagram shown in Figure 1. At first I thought the diagram was neat because it's a good example of the old English idiom: "A picture is worth a thousand words." However, as I continued to look at Figure 1 I began to detect what I believe are errors in the diagram.

Reader, please take a few moments to see if you detect any errors in Figure 1.

...

Should DSP Undergraduate Students Study z-Transform Regions of Convergence?

Rick Lyons ● September 14, 2016●13 comments

Not long ago I presented my 3-day DSP class to a group of engineers at Tektronix Inc. in Beaverton Oregon [1]. After I finished covering my material on IIR filters' z-plane pole locations and filter stability, one of the Tektronix engineers asked a question similar to:

     "I noticed that you didn't discuss z-plane regions of      convergence here. In my undergraduate DSP class we      spent a lot of classroom and homework time on the  ...

Discrete Wavelet Transform Filter Bank Implementation (part 2)

David ● December 5, 2010●9 comments

Following the previous blog entry: http://www.dsprelated.com/showarticle/115.php

Difference between DWT and DWPT

Before getting to the equivalent filter obtention, I first want to talk about the difference between DWT(Discrete Wavelet Transform) and DWPT (Discrete Wavelet Packet Transform). The latter is used mostly for image processing.

While DWT has a single "high-pass" branch that filters the signal with the h1 filter, the DWPT separates branches symmetricaly: this means that one...

A Fast Real-Time Trapezoidal Rule Integrator

Rick Lyons ● June 13, 2020●4 comments

This blog presents a computationally-efficient network for computing real‑time discrete integration using the Trapezoidal Rule.

Background

While studying what is called "N-sample Romberg integration" I noticed that such an integration process requires the computation of many individual smaller‑sized integrations using the Trapezoidal Rule integration method [1]. My goal was to create a computationally‑fast real‑time Trapezoidal Rule integration network to increase the processing...

Feedback Controllers - Making Hardware with Firmware. Part I. Introduction

Steve Maslen ● August 22, 2017
Introduction to the topic 

This is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.

  • Part 1: 

Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2

Mike Dunn ● November 12, 2007●3 comments

Configuration

The previous article discussed CCS configuration. The prerequisite for the following discussion is a valid CCS configuration file. All references will be for CCS 3.3, but they may be used or adapted to other versions of CCS. From the previous discussion, we know that the configuration file is located at 'C:\CCStudio_v3.3\cc\bin\brddat\ccBrd0.dat'.

XDS510 Emulators

Initial discussion will address only XDS510 class emulators that support TI drivers and utilities. This will...

Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 1

Mike Dunn ● October 30, 2007●15 comments

Introduction

Today I am going to discuss some of the basics that can help prevent errors that frustrate some users. The information is directed toward TI C6000 family DSPs, but much of it also applies to other TI DSPs. In many cases they represent the user's first involvement with using Code Composer Studio [CCS] and a target board. It has been my experience that the primary cause of the "Can't initialize target CPU" error message and similar messages like "Error connecting to...

FIR sideways (interpolator polyphase decomposition)

Markus Nentwig ● September 12, 2012●9 comments

An efficient implementation of a symmetric-FIR polyphase 1:3 interpolator that doesn't follow the usual tapped delay line-paradigm. The example exploits the impulse response symmetry and avoids four multiplications out of 10. keywords: symmetric polyphase FIR filter implementation ASIC Matlab / Octave implementation

Introduction

An interpolating FIR filter can be implemented with a single tapped delay line, possibly going forwards and backwards for a symmetric impulse response. To...

Generating Partially Correlated Random Variables

Harry Commin ● March 23, 2019●21 comments
IntroductionIt is often useful to be able to generate two or more signals with specific cross-correlations. Or, more generally, we would like to specify an $\left(N \times N\right)$ covariance matrix, $\mathbf{R}_{xx}$, and generate $N$ signals which will produce this covariance matrix.

There are many applications in which this technique is useful. I discovered a version of this method while analysing radar systems, but the same approach can be used in a very wide range of...

Simple Concepts Explained: Fixed-Point

Leandro Stefanazzi ● January 24, 2023●11 comments
Introduction

Most signal processing intensive applications on FPGA are still implemented relying on integer or fixed-point arithmetic. It is not easy to find the key ideas on quantization, fixed-point and integer arithmetic. In a series of articles, I aim to clarify some concepts and add examples on how things are done in real life. The ideas covered are the result of my professional experience and hands-on projects.

In this article I will present the most fundamental question you...

Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators

Steve Maslen ● January 5, 2018●7 comments
This article will look at some DSP Sine-wave oscillators and will show how an FPGA with limited floating-point performance due to latency, can be persuaded to produce much higher sample-rate sine-waves of high quality. 

Comparisons will be made between implementations on Intel Cyclone V and Cyclone 10 GX FPGAs. An Intel numerically controlled oscillator

Some Thoughts on Sampling

Qasim Chaudhari ● November 15, 2016●2 comments

Some time ago, I came across an interesting problem. In the explanation of sampling process, a representation of impulse sampling shown in Figure 1 below is illustrated in almost every textbook on DSP and communications. The question is: how is it possible that during sampling, the frequency axis gets scaled by $1/T_s$ -- a very large number? For an ADC operating at 10 MHz for example, the amplitude of the desired spectrum and spectral replicas is $10^7$! I thought that there must be...