Dealing With Fixed Point Fractions
Fixed point fractional representation always gives me a headache because I screw it up the first time I try to implement an algorithm. The difference between integer operations and fractional operations is in the overflow. If the representation fits in the fixed point result, you can not tell the difference between fixed point integer and fixed point fractions. When integers overflow, they lose data off the most significant bits. When fractions overflow, they lose data off...
The DFT Output and Its Dimensions
The Discrete Fourier Transform, or DFT, converts a signal from discrete time to discrete frequency. It is commonly implemented as and used as the Fast Fourier Transform (FFT). This article will attempt to clarify the format of the DFT output and how it is produced.
Living in the real world, we deal with real signals. The data we typically sample does not have an imaginary component. For example, the voltage sampled by a receiver is a real value at a particular point in time. Let’s...
Amplitude modulation and the sampling theorem
I am working on the 11th and probably final chapter of Think DSP, which follows material my colleague Siddhartan Govindasamy developed for a class at Olin College. He introduces amplitude modulation as a clever way to sneak up on the Nyquist–Shannon sampling theorem.
Most of the code for the chapter is done: you can check it out in this IPython notebook. I haven't written the text yet, but I'll outline it here, and paste in the key figures.
Convolution...
Exponential Smoothing with a Wrinkle
Introduction
This is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by providing a set of preprocessing filters to improve the resolution of the DFT. Because of the exponential nature of sinusoidal functions, they have special mathematical properties when exponential smoothing is applied to them. These properties are derived and explained in this blog article.
Basic Exponential Smoothing
Exponential smoothing is also known as...
Discrete-Time PLLs, Part 1: Basics
In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.
Compressive Sensing - Recovery of Sparse Signals (Part 1)
The amount of data that is generated has been increasing at a substantial rate since the beginning of the digital revolution. The constraints on the sampling and reconstruction of digital signals are derived from the well-known Nyquist-Shannon sampling theorem...
Analytic Signal
In communication theory and modulation theory we always deal with two phases: In-phase (I) and Quadrature-phase (Q). The question that I will discuss in this blog is that why we use two phases and not more.
Multilayer Perceptrons and Event Classification with data from CODEC using Scilab and Weka
For my first blog, I thought I would introduce the reader to Scilab [1] and Weka [2]. In order to illustrate how they work, I will put together a script in Scilab that will sample using the microphone and CODEC on your PC and save the waveform as a CSV file.
Maximum Likelihood Estimation
Any observation has some degree of noise content that makes our observations uncertain. When we try to make conclusions based on noisy observations, we have to separate the dynamics of a signal from noise.
Approximating the area of a chirp by fitting a polynomial
Once in a while we need to estimate the area of a dataset in which we are interested. This area could give us, for example, force (mass vs acceleration) or electric power (electric current vs charge).
Two Bin Exact Frequency Formulas for a Pure Real Tone in a DFT
IntroductionThis is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by deriving exact formulas for the frequency of a real tone in a DFT. This time it is a two bin version. The approach taken is a vector based one similar to the approach used in "Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT"[1]. The real valued formula presented in this article actually preceded, and was the basis for the complex three bin...
Feedback Controllers - Making Hardware with Firmware. Part 8. Control Loop Test-bed
This part in the series will consider the signals, measurements, analyses and configurations for testing high-speed low-latency feedback loops and their controllers. Along with basic test signals, a versatile IFFT signal generation scheme will be discussed and implemented. A simple controller under test will be constructed to demonstrate the analysis principles in preparation for the design and evaluation of specific controllers and closed-loop applications.
Additional design...Design study: 1:64 interpolating pulse shaping FIR
This article is the documentation to a code snippet that originated from a discussion on comp.dsp.
The task is to design a root-raised cosine filter with a rolloff of a=0.15 that interpolates to 64x the symbol rate at the input.
The code snippet shows a solution that is relatively straightforward to design and achieves reasonably good efficiency using only FIR filters.
Motivation: “simple solutions?”DSP Related Math: Nice Animated GIFs
I was browsing the ECE subreddit lately and found that some of the most popular posts over the last few months have been animated GIFs helping understand some mathematical concepts. I thought there would be some value in aggregating the DSP related gifs on one page.
The relationship between sin, cos, and right triangles: Constructing a square wave with infinite series (see this...Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware
Following on from the previous abstract descriptions of an arbitrary circuit emulation application for low-latency feedback controllers, we now come to some aspects in the hardware engineering of an evaluation design from concept to first power-up. In due course a complete specification along with application examples will be maintained on the project website.- Part 1: Introduction
- Part 2:...
Polar Coding Notes: Channel Combining and Channel Splitting
Channel Combining
Channel combining is a step that combines copies of a given B-DMC $W$ in a recursive manner to produce a vector channel $W_N : {\cal X}^N \to {\cal Y}^N$, where $N$ can be any power of two, $N=2^n, n\le0^{[1]}$.
The notation $u_1^N$ as shorthand for denoting a row vector $(u_1, \dots , u_N)$.
The vector channel $W_N$ is the virtual channel between the input sequence $u_1^N$ to a linear encoder and the output sequence $y^N_1$ of $N$...
Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples
Developing and Validating Simulation ModelsThis article will describe models for simulating the systems and controllers for the hardware emulation application described in Part 1 of the series.
- Part 1: Introduction
- Part 2: Ideal Model Examples
- Part 3: Sampled Data Aspects
- Part 4: Engineering of Evaluation Hardware
- Part 5:
Bank-switched Farrow resampler
Bank-switched Farrow resampler SummaryA modification of the Farrow structure with reduced computational complexity.Compared to a conventional design, the impulse response is broken into a higher number of segments. Interpolation accuracy is achieved with a lower polynomial order, requiring fewer multiplications per output sample at the expense of a higher overall number of coefficients.
Example codeThis code snippet provides a Matlab / Octave implementation.And
Python scipy.signal IIR Filter Design Cont.
In the previous post the Python scipy.signal iirdesign function was disected. We reviewed the basics of filter specification and reviewed how to use the iirdesign function to design IIR filters. The previous post I only demonstrated low pass filter designs. The following are examples how to use the iirdesign function for highpass, bandpass, and stopband filters designs.
Highpass FilterThe following is a highpass filter design for the different filter...
Compute Images/Aliases of CIC Interpolators/Decimators
Cascade-Integrator-Comb (CIC) filters are efficient fixed-point interpolators or decimators. For these filters, all coefficients are equal to 1, and there are no multipliers. They are typically used when a large change in sample rate is needed. This article provides two very simple Matlab functions that can be used to compute the spectral images of CIC interpolators and the aliases of CIC decimators.
1. CIC InterpolatorsFigure 1 shows three interpolate-by-M...
Multilayer Perceptrons and Event Classification with data from CODEC using Scilab and Weka
For my first blog, I thought I would introduce the reader to Scilab [1] and Weka [2]. In order to illustrate how they work, I will put together a script in Scilab that will sample using the microphone and CODEC on your PC and save the waveform as a CSV file.
Bank-switched Farrow resampler
Bank-switched Farrow resampler SummaryA modification of the Farrow structure with reduced computational complexity.Compared to a conventional design, the impulse response is broken into a higher number of segments. Interpolation accuracy is achieved with a lower polynomial order, requiring fewer multiplications per output sample at the expense of a higher overall number of coefficients.
Example codeThis code snippet provides a Matlab / Octave implementation.And
Instant CIC
Summary:
A floating point model for a CIC decimator, including the frequency response.
Description:
A CIC filter relies on a peculiarity of its fixed-point implementation: Normal operation involves repeated internal overflows that have no effect to the output signal, as they cancel in the following stage.
One way to put it intuitively is that only the speed (and rate of change) of every little "wheel" in the clockworks carries information, but its absolute position is...
Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators
This article will look at some DSP Sine-wave oscillators and will show how an FPGA with limited floating-point performance due to latency, can be persuaded to produce much higher sample-rate sine-waves of high quality.Comparisons will be made between implementations on Intel Cyclone V and Cyclone 10 GX FPGAs. An Intel numerically controlled oscillator
Modelling a Noisy Communication Signal in MATLAB for the Analog to Digital Conversion Process
A critical thing to realize while modeling the signal that is going to be digitally processed is the SNR. In a receiver, the noise floor (hence the noise variance and hence its power) are determined by the temperature and the Bandwidth. For a system with a constant bandwidth, relatively constant temperature, the noise power remains relatively constant as well. This implies that the noise variance is a constant.
In MATLAB, the easiest way to create a noisy signal is by using...
Hidden Linear Algebra in DSP
Linear algebra (LA) is usually thought of as a blunt theoretical subject. However, LA is found hidden in many DSP algorithms used widely in practice.
An obvious clue in finding LA in DSP is the linearity assumption used in theoretical analysis of systems for modelling or design. A standard modelling example for this case would be linear time invariant (LTI) systems. LTI are usually used to model flat wireless communication channels. LTI systems are also used in the design of digital filter...
Python number crunching faster? Part I
Everyone has their favorite computing platform, regardless if it is Matlab, Octave, Scilab, Mathematica, Mathcad, etc. I have been using Python and the common numerical and scientific packages available. Personally, I have found this to be very useful in my work. Lately there has been some chatter on speeding up Python.
From another project I follow, MyHDL, I was introduced to the Python JIT compiler,
Deconvolution by least squares (Using the power of linear algebra in signal processing).
When we deal with our normal discrete signal processing operations, like FIR/IIR filtering, convolution, filter design, etc. we normally think of the signals as a constant stream of numbers that we put in a sequence
Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples
Developing and Validating Simulation ModelsThis article will describe models for simulating the systems and controllers for the hardware emulation application described in Part 1 of the series.
- Part 1: Introduction
- Part 2: Ideal Model Examples
- Part 3: Sampled Data Aspects
- Part 4: Engineering of Evaluation Hardware
- Part 5:
Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware
Following on from the previous abstract descriptions of an arbitrary circuit emulation application for low-latency feedback controllers, we now come to some aspects in the hardware engineering of an evaluation design from concept to first power-up. In due course a complete specification along with application examples will be maintained on the project website.- Part 1: Introduction
- Part 2:...
