The Discrete Fourier Transform and the Need for Window Functions
The FFT alone can mislead: capturing a finite-length signal with a rectangular window smears energy across frequency, producing spectral leakage that hides real components. This post explains the origin of leakage, shows how tapered windows such as the Hanning window suppress sidelobes, and demonstrates the tradeoff between sidelobe suppression and mainlobe widening while covering practical tips on zero-padding and record length.
The 2021 DSP Online Conference
Packed with practical talks and hands-on workshops, the 2021 DSP Online Conference gives DSP engineers a quick way to refresh skills and learn new techniques. Registering grants full access to talks, workshops, and Q&A at this year's event plus instant access to last year's videos. Highlights include FIR filter design with Python, software-defined radio, convolution reviews, and DSP/ML tools for IoT, with registration discounts on request.
Modeling Anti-Alias Filters
Modeling anti-alias filters brings textbook aliasing examples to life. This post shows how to build discrete-time models G(z) for analog Butterworth and Chebyshev lowpass anti-alias filters, compares bilinear transform and impulse invariance, and simulates ADC input/output including aliasing of sinusoids and Gaussian noise. It concludes that impulse invariance gives better stopband accuracy and includes Matlab helper functions.
In Search of The Fourth Wave
While working on Think DSP the presenter ran into a curious spectral pattern: sawtooth waves have all harmonics with amplitudes that scale like 1/f, square waves keep only odd harmonics with 1/f, and triangle waves keep odd harmonics with 1/f^2. That observation motivates a simple question: is there a basic waveform that has all integer harmonics but a 1/f^2 rolloff? The talk walks through four solution approaches, a fifth idea from the audience, and links to a runnable Colab notebook.
Sampling bandpass signals
Bandpass signals can be sampled at rates below the usual Nyquist limit, and this note shows how the band-limited spectrum appears in baseband after sampling. Using a simple example figure, it defines the center frequency fc = (fmax + fmin)/2 and bandwidth Δf = fmax - fmin, and highlights that choosing fs less than twice the signal's highest frequency violates the sampling theorem.
Digital Filter Instructions from IKEA?
This is a wordless example of a folded FIR filter. Swedish “Bygglek” = build and play.
Simulink-Simulation of SSB demodulation
This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.
Setting Carrier to Noise Ratio in Simulations
Setting the right Gaussian noise level is easy once you know the math. This post derives simple, practical equations to compute noise density and the rms noise amplitude needed to achieve a target carrier to noise ratio at a receiver output. It shows how to get the noise-equivalent bandwidth from a discrete-time filter, how to compute N0 and sigma, and includes a MATLAB set_cnr function to generate the noise vector.
An Efficient Full-Band Sliding DFT Spectrum Analyzer
Rick Lyons shows two compact sliding DFT networks that compute the 0th bin and all positive-frequency outputs for even and odd N, running sample-by-sample on real input streams. The designs reduce computational workload versus a prior observer-based sliding DFT by using fewer parallel paths, while remaining guaranteed stable and avoiding the traditional comb delay-line. A simple initialization and streaming procedure makes them practical for real-time spectrum analysis.
Update to a Narrow Bandpass Filter in Octave or Matlab
Paul Lovell presents an updated, compact Octave/Matlab implementation of a narrow bandpass FIR that runs about four times faster and uses float32 to cut processing cost. The design combines a single matrix IFIR stage with three moving-sum (RRS) stages per baseband, auto-calculates the IFIR expansion factor, and adds easier parameter setup plus WAV I/O and FFT plots. A TensorFlow Colab demo is also provided.
Pulse Shaping in Single-Carrier Communication Systems
Eric Jacobsen clears up common confusion around pulse shaping in single-carrier communications, focusing on matched filtering, Nyquist filtering, and related terminology. He uses the NRZ rectangular pulse as a concrete example to show how the transmit spectrum becomes a sinc envelope when the bitstream has enough randomness, and he highlights how bit patterns and context-sensitive terms can change the observed behavior.
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2
Mike Dunn walks through practical, low-level debugging to fix "Can't initialize target CPU" on TI C6000 DSPs using CCS 3.3, focusing on XDS510-class emulators. He demonstrates how to run xdsprobe to perform JTAG resets, read and interpret adapter and port error messages, and run JTAG IR/DR integrity tests. The article shows example outputs and a simple scope-based trace to locate signal faults.
Launch of Youtube Channel: My First Videos - Embedded World 2017
Stephane Boucher turned his Embedded World 2017 trip into a debut YouTube series of short booth highlight videos. He walks through the steep learning curve of trade-show filming, the specific gear he bought and rented to cope with low light and noise, and the practical mistakes he plans to fix. The post lists filmed vendors and asks readers for feedback to improve future episodes.
Already 3000+ Attendees Registered for the Upcoming Embedded Online Conference
More than 3,000 engineers have already signed up for the Embedded Online Conference, and free registration closes at the end of February. Stephane Boucher highlights four practical tracks—DSP and machine learning, FPGA, embedded systems programming, and embedded systems security—and notes that every talk will be available to stream on demand from May 20. If you prefer no-travel learning or want flexible access to world-class talks, register now.
Take Control of Noise with Spectral Averaging
Spectral averaging turns noisy FFT outputs into repeatable, measurable spectra by trading time for noise control. This post explains the practical difference between RMS averaging, which reduces variance without changing the noise floor, and vector averaging, which can lower the noise floor but requires phase-coherent, triggered inputs. It also shows how linear and exponential weighting affect reaction time for live displays and measurement accuracy.
Improved Narrowband Lowpass IIR Filters
Rick Lyons presents a practical trick from his DSP book that makes narrowband lowpass IIR filters usable in fixed-point systems. By replacing unit delays with M-length delay lines to form an interpolated-IIR, pole radii and angles are transformed so desired poles fall into quantizer-friendly locations without wider coefficient words or extra multiplies. A following CIC image-reject stage removes replicated passbands to meet tight stopband specs.
5G NR QC-LDPC Encoding Algorithm
Lyons Zhang breaks down the 5G NR QC-LDPC encoding structure, emphasizing the circulant permutation matrices and why QC-LDPC suits simple hardware. The post defines the Q(P) and Q(-1) notation, summarizes BG1 and BG2 dimensions and selection rules, and shows how the parity-check matrix is partitioned for practical encoder implementations.
Round Round Get Around: Why Fixed-Point Right-Shifts Are Just Fine
Jason Sachs explains why, in most embedded systems, simple bitwise right-shifts are an acceptable way to do fixed-point division rather than paying the runtime cost to round. He shows the cheap trick of adding 2^(N-1) to implement round-to-nearest, explains unbiased "round-to-even" issues, and compares arithmetic error to much larger ADC and sensor errors. The takeaway: save cycles unless your algorithm or inputs require extra precision.
Phase and Amplitude Calculation for a Pure Real Tone in a DFT: Method 1
Cedron Dawg shows how to get exact amplitude and phase for a real sinusoid whose frequency does not land on an integer DFT bin. The method treats a small neighborhood of DFT bins as a complex vector, builds two basis vectors from the cosine and sine transforms, and solves a 2x2 system using conjugate dot products to recover real coefficients that give amplitude and phase. A C++ example and sample output verify the formulas.
Adventures in Signal Processing with Python
Jason Sachs shows how PyLab (numpy, scipy, matplotlib) can handle many signal-processing and visualization tasks engineers usually reach for MATLAB to do. He walks through practical examples including PWM ripple, two pole RC filters, and symbolic math with SymPy, and shares real-world installation tips and trade-offs. The post closes with pointers to IPython and pandas to speed interactive analysis and data handling.
An s-Plane to z-Plane Mapping Example
A misleading online diagram prompted Rick Lyons to reexamine how s-plane points map to the z-plane. He spotted apparent errors in the original figure, drew a corrected mapping, and invites readers to inspect both diagrams and point out any remaining mistakes. The short post is a quick visual primer for engineers who rely on accurate s-plane to z-plane mappings in analysis and design.
Evaluate Window Functions for the Discrete Fourier Transform
Spectral leakage makes DFTs of continuous sinewaves misleading, and windowing is the practical workaround. This post supplies Matlab code to plot spectra of windowed sinewaves and compute figures of merit, so you can compare windows such as flattop and Chebyshev. See how sidelobe level, mainlobe bandwidth, processing loss, noise bandwidth, and scallop loss trade off to guide your window choice.
Digital PLL's -- Part 2
Neil Robertson builds a Z-domain model of a second-order digital PLL with a proportional-plus-integral loop filter, then derives closed-form formulas for KL and KI from the desired loop natural frequency and damping. The post explains the s → (z - 1)/Ts approximation, shows how to form the closed-loop IIR CL(z) for step and frequency responses, and highlights when the linear Z-domain model falls short of nonlinear acquisition behavior.
Embedded Toolbox: Programmer's Calculator
A tiny but powerful cross-platform tool, QCalc evaluates full C-syntax expressions so you can paste results straight into firmware. It handles bitwise ops, mixed hex/decimal/binary constants, and scientific math, and it automatically shows integer results in formatted hex and binary. The post explains key features, variable handling, error messages, and how to run qcalc.tcl with the wish Tk interpreter.
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Jason Sachs demystifies Reed-Solomon codes with hands-on examples and pragmatic tips for embedded engineers. The article shows why RS encoding is just polynomial division in GF(2^m), why decoding is mathematically heavier, and how to implement encoders in Python and in C-friendly form using LFSRs and table-driven methods. Read this for working code, generator-polynomial examples, and an embedded-minded view of RS practicalities.
Free Goodies from Embedded World - What to Do Next?
Stephane Boucher went on a hunt for free stuff at Embedded World to assemble a giveaway bundle for a lucky reader. This short update shares that haul and asks the embedded community for ideas on what to do next. It is a conversational call for suggestions, aiming to turn conference swag into a useful prize.
The Power Spectrum
You can get absolute power from a DFT, not just relative spectra. In this post Neil Robertson shows how to convert FFT outputs into watts per bin using Parseval's theorem, how to form one-sided spectra, and how to normalize windows so power is preserved. Matlab examples demonstrate bin-centered and between-bin sinusoids, leakage, scalloping, and how to recover component power by summing bins.
A Differentiator With a Difference
Rick Lyons presents a compact, practical FIR differentiator that combines central-difference noise attenuation with a much wider linear range. The proposed ydif(n) doubles the usable frequency range to about 0.34π (0.17fs), uses ±1/16 coefficients so multiplications become simple 4-bit right shifts, and has an exact three-sample group delay for easy synchronization with other signals.
A New Related Site!
The post announces the launch of MLRelated, a new Related site dedicated to machine learning and deep learning. It positions MLRelated as complementary to existing Related sites by highlighting cross-cutting interests: TinyML for embedded developers, machine/deep learning applications in signal processing, and FPGA-based AI/ML implementations. The new site debuts with a modest amount of content and is expected to expand rapidly through contributions from the Related community in the form of blogs, forum threads, and webinars. The author invites readers to report navigation errors, share feedback, and propose ideas to help steer MLRelated into a practical, community-driven resource for researchers and practitioners in ML and adjacent domains.
Fractional Delay FIR Filters
You can realize arbitrary fractional-sample delays with standard FIR filters by shifting a sinc impulse response and removing symmetry, then windowing the result. This post shows a practical window-method implementation using Chebyshev windows, gives Matlab functions (frac_delay_fir.m and frac_delay_lpf.m) in the appendix, and walks through examples that demonstrate the delay, magnitude trade-offs, and how increasing taps widens the flat-delay bandwidth.
New Code Sharing Section & Reward Program for Contributors!
DSPRelated is launching a new code sharing section and looking for contributors to help seed it with useful DSP snippets. Stephane Boucher also introduces a pageview-based reward program, with payouts tied to unique visits so popular code can earn contributors up to $250. It is a practical push to build a high-quality library for the DSP community from the start.
50,000th Member Announced!
DSPRelated just crossed a major milestone, 50,000 registered members, and Stephane Boucher celebrates the anniversary by spotlighting the lucky winner, Charlie Tsai, an assistant professor in Taiwan. The post also looks back at more than a decade of community growth and thanks the contributors, authors, and sponsors who helped make the site a go-to DSP resource. It closes with a promise of big improvements ahead in 2010.
Almost 50,000 Members!
DSPRelated is about to hit a big milestone, and Stephane Boucher marks the moment with a playful giveaway announcement. The post jokes about a BMW prize for the 50,000th registered member, then reveals the real reward, a copy of Rick Lyons’ Understanding Digital Signal Processing. It is a lighthearted community update built around a membership milestone and a bit of fun.
DSPRelated faster than ever!
Stephane Boucher moved DSPRelated's static assets to Amazon CloudFront to shrink page load times worldwide. Images, JavaScript and CSS are now served from the nearest CloudFront edge server, reducing latency especially for readers in Europe and Asia. If you visit regularly, you should notice the speedup, and the author asks readers to report their load-time experience in the comments.
New Papers / Theses Section
Stephane Boucher launched a Papers & Theses section on DSPRelated to gather DSP dissertations and papers in one spot. Authors can submit already-hosted documents or upload PDFs for optional hosting, provided they have sharing rights, and help is available for PDF conversion. Listing your work boosts visibility and opportunities, and non-English documents are welcomed while the section is in beta.
New Blog Section!
DSPRelated just launched a new blogs section, and it is already starting to take shape. Stephane Boucher says he received around 50 proposals from DSP engineers, chose an initial set of 10 bloggers, and is now setting up their accounts. The section is still in beta, but there is also more on the way, including a future area for sharing quality code in asm, C, and MATLAB.
New Discussion Group: DSP & FPGA
Stephane Boucher has launched a new discussion group for engineers implementing DSP functions on FPGAs. It is meant to become a focused place for sharing ideas, but he notes it may take a few weeks before enough members join for the discussion to really get going. If FPGA-based DSP is your thing, this is an open invitation to get involved early.
