Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally

Steve Maslen November 22, 2018

This article will look at a design approach for feedback controllers featuring  low-latency "irrational" characteristics to enable the creation of physical components such as transmission lines. Some thought will also be given as to the capabilities of the currently utilized Intel Cyclone V, the new Cyclone 10 GX and the upcoming Xilinx Versal floating-point FPGAs/ACAPs.    

Fig 1. Making a Transmission Line, with the Circuit Emulator

 

Additional...


Polar Coding Notes: A Simple Proof

Lyons Zhang November 8, 2018

For any B-DMC $W$, the channels $\{W_N^{(i)}\}$ polarize in the sense that, for any fixed $\delta \in (0, 1)$, as $N$ goes to infinity through powers of two, the fraction of indices $i \in \{1, \dots, N\}$ for which $I(W_N^{(i)}) \in (1 − \delta, 1]$ goes to $I(W)$ and the fraction for which $I(W_N^{(i)}) \in [0, \delta)$ goes to $1−I(W)^{[1]}$.

Mrs. Gerber’s Lemma

Mrs. Gerber’s Lemma provides a lower bound on the entropy of the modulo-$2$ sum of two binary random...


Polar Coding Notes: Channel Combining and Channel Splitting

Lyons Zhang October 19, 2018

Channel Combining  

Channel combining is a step that combines copies of a given B-DMC $W$ in a recursive manner to produce a vector channel $W_N : {\cal X}^N \to {\cal Y}^N$, where $N$ can be any power of two, $N=2^n, n\le0^{[1]}$.  

The notation $u_1^N$ as shorthand for denoting a row vector $(u_1, \dots , u_N)$.  

The vector channel $W_N$ is the virtual channel between the input sequence $u_1^N$ to a linear encoder and the output sequence $y^N_1$ of $N$...


Project Report : Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo August 13, 20181 comment

The Google Summer of Code 2018 is now in its final stages, and I’d like to take a moment to look back at what goals were accomplished, what remains to be completed and what I have learnt.

The project overview was discussed in the previous blog posts. However this post serves as a guide to anyone who wishes to learn about the project or carry it forward. Hence I will go over the project details again.

Project overview

The project “Digital Filter Blocks in MyHDL and PyFDA integration" aims...


Sensors Expo - Trip Report & My Best Video Yet!

Stephane Boucher August 3, 20183 comments

This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.  

Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip.  If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...


Design a DAC sinx/x Corrector

Neil Robertson July 22, 20187 comments

This post provides a Matlab function that designs linear-phase FIR sinx/x correctors.  It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.

A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process.  In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses.  These are converted by the DAC into contiguous pulses...


Off Topic: Refraction in a Varying Medium

Cedron Dawg July 11, 2018
Introduction

This article is another digression from a better understanding of the DFT. In fact, it is a digression from DSP altogether. However, since many of the readers here are Electrical Engineers and other folks who are very scientifically minded, I hope this article is of interest. A differential vector equation is derived for the trajectory of a point particle in a field of varying index of refraction. This applies to light, of course, but since it is a purely theoretical...


Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop

Steve Maslen July 9, 2018

It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.    

Fig 1. The evaluation platform

Additional design...


Project update-2 : Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo July 9, 2018

This is an exciting update in the sense that it demonstrates a working model of one important aspect of the project: The integration or ‘glue’ between and Pyfda and MyHDL filter blocks. 

So, why do we need to integrate and how do we go about it?

As discussed in earlier posts, the idea is to provide a workflow in Pyfda that automates the process of Implementing a fixpoint filter in VHDL / Verilog, and verify the correct performance in a digital design environment. MyHDL based...


Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo June 22, 2018

This blog post presents the progress made up to week 5 in my GSoC project “Digital Filter blocks and their integration in PyFDA”. Progress was made in two areas of the project.

  • Implementation of filter blocks in MyHDL
  • Design of interface between filter blocks and PyFDA

This post will primarily discuss filter block implementation. The interface will be discussed in a later post once further progress is made.

Direct form-I FIR filter

The equation specifies the direct form I...


Optimizing the Half-band Filters in Multistage Decimation and Interpolation

Rick Lyons January 4, 201616 comments

This blog discusses a not so well-known rule regarding the filtering in multistage decimation and interpolation by an integer power of two. I'm referring to sample rate change systems using half-band lowpass filters (LPFs) as shown in Figure 1. Here's the story.

Figure 1: Multistage decimation and interpolation using half-band filters.

Multistage Decimation – A Very Brief Review

Figure 2(a) depicts the process of decimation by an integer factor D. That...


Oscilloscope Dreams

Jason Sachs January 14, 20125 comments

My coworkers and I recently needed a new oscilloscope. I thought I would share some of the features I look for when purchasing one.

When I was in college in the early 1990's, our oscilloscopes looked like this:

Now the cathode ray tubes have almost all been replaced by digital storage scopes with color LCD screens, and they look like these:

Oscilloscopes are basically just fancy expensive boxes for graphing voltage vs. time. They span a wide range of features and prices:...


Noise shaping

Markus Nentwig December 9, 20123 comments

eywords: Quantization noise; noise shaping

A brief introduction to noise shaping, with firm resolve not to miss the forest for the trees. We may still stumble over some assorted roots. Matlab example code is included.

Quantization

Fig. 1 shows a digital signal that is reduced to a lower bit width, for example a 16 bit signal being sent to a 12 bit digital-to-analog converter. Rounding to the nearest output value is obviously the best that can be done to minimize the error of each...


Round Round Get Around: Why Fixed-Point Right-Shifts Are Just Fine

Jason Sachs November 22, 20163 comments

Today’s topic is rounding in embedded systems, or more specifically, why you don’t need to worry about it in many cases.

One of the issues faced in computer arithmetic is that exact arithmetic requires an ever-increasing bit length to avoid overflow. Adding or subtracting two 16-bit integers produces a 17-bit result; multiplying two 16-bit integers produces a 32-bit result. In fixed-point arithmetic we typically multiply and shift right; for example, if we wanted to multiply some...


Design IIR Filters Using Cascaded Biquads

Neil Robertson February 11, 201817 comments
This article shows how to implement a Butterworth IIR lowpass filter as a cascade of second-order IIR filters, or biquads.  We’ll derive how to calculate the coefficients of the biquads and do some examples using a Matlab function biquad_synth provided in the Appendix.  Although we’ll be designing Butterworth filters, the approach applies to any all-pole lowpass filter (Chebyshev, Bessel, etc).  As we’ll see, the cascaded-biquad design is less sensitive to coefficient...

TCP/IP interface (Matlab/Octave)

Markus Nentwig June 17, 201210 comments

Communicate with measurement instruments via Ethernet (no-toolbox-Matlab or Octave)

Purpose

Measurement automation is digital signal processing in a wider sense: Getting a digital signal from an analog world usually involves some measurement instruments, for example a spectrum analyzer. Modern instruments, and also many off-the-shelf prototyping boards such as FPGA cards [1] or microcontrollers [2] are able to communicate via Ethernet. Here, I provide some basic mex-functions (compiled C...


How Discrete Signal Interpolation Improves D/A Conversion

Rick Lyons May 28, 20121 comment
This blog post is also available in pdf format. Download here.

Earlier this year, for the Linear Audio magazine, published in the Netherlands whose subscribers are technically-skilled hi-fi audio enthusiasts, I wrote an article on the fundamentals of interpolation as it's used to improve the performance of analog-to-digital conversion. Perhaps that article will be of some value to the subscribers of dsprelated.com. Here's what I wrote:

We encounter the process of digital-to-analog...


An s-Plane to z-Plane Mapping Example

Rick Lyons September 24, 20166 comments

While surfing around the Internet recently I encountered the 's-plane to z-plane mapping' diagram shown in Figure 1. At first I thought the diagram was neat because it's a good example of the old English idiom: "A picture is worth a thousand words." However, as I continued to look at Figure 1 I began to detect what I believe are errors in the diagram.

Reader, please take a few moments to see if you detect any errors in Figure 1.

...

Computing Large DFTs Using Small FFTs

Rick Lyons June 23, 200815 comments

It is possible to compute N-point discrete Fourier transforms (DFTs) using radix-2 fast Fourier transforms (FFTs) whose sizes are less than N. For example, let's say the largest size FFT software routine you have available is a 1024-point FFT. With the following trick you can combine the results of multiple 1024-point FFTs to compute DFTs whose sizes are greater than 1024.

The simplest form of this idea is computing an N-point DFT using two N/2-point FFT operations. Here's how the trick...


The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase

Rick Lyons August 18, 201516 comments

This blog discusses a little-known filter characteristic that enables real- and complex-coefficient tapped-delay line FIR filters to exhibit linear phase behavior. That is, this blog answers the question:

What is the constraint on real- and complex-valued FIR filters that guarantee linear phase behavior in the frequency domain?

I'll declare two things to convince you to continue reading.

Declaration# 1: "That the coefficients must be symmetrical" is not a correct


DSPRelated faster than ever!

Stephane Boucher March 2, 20094 comments

if you are visiting DSPRelated.com on a regular basis, you should observe that the site loads significantly faster in your browser than it used to, especially if you are in Europe or in Asia.  The main reason for this is that I am now using Amazon's CloudFront service for the delivery of most static content on DSPRelated.com (images, javascripts, css).   The cloudFront service automatically detects the location of a visitor and will deliver the static content from the server...


New Papers / Theses Section

Stephane Boucher March 21, 20081 comment

The new 'Papers & Theses' section is now online: http://www.dsprelated.com/documents.phpThe idea is to list and organize in one place as many DSP related dissertations (PhD & Masters) and papers/articles as possible.If you are the author of a thesis or paper and would like to have it listed on DSPRelated.com, please follow these steps:- Make sure that you are allowed to share the document online (copyright).- If you don't already have one, make a 'pdf' copy of your document. ...


New Blog Section!

Stephane Boucher September 19, 20072 comments

By now, chances are you have noticed the new blogs section (you are actually in it right now!).

Following an email I sent to the members of the site, a few weeks ago, asking for dsp engineers willing to blog here, I received around 50 propositions. I have selected an initial set of 10 bloggers (that I will soon introduce into a seperate post) and I am currently in the process of creating their accounts. Markus and Parth have already...


New Discussion Group: DSP & FPGA

Stephane Boucher September 11, 20078 comments

I have just created a new discussion group for engineers implementing DSP functions on FPGAs. The creation of this group has been on my todo list for a long time. If you want to join the group, send a blank email to: fpgadsp-subscribe@yahoogroups.com

As usual, it should take a few weeks before there are enough members for interesting discussions to get started.