Sensors Expo - Trip Report & My Best Video Yet!
This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.
Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip. If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Off Topic: Refraction in a Varying Medium
Introduction
This article is another digression from a better understanding of the DFT. In fact, it is a digression from DSP altogether. However, since many of the readers here are Electrical Engineers and other folks who are very scientifically minded, I hope this article is of interest. A differential vector equation is derived for the trajectory of a point particle in a field of varying index of refraction. This applies to light, of course, but since it is a purely theoretical...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
Project update-2 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This is an exciting update in the sense that it demonstrates a working model of one important aspect of the project: The integration or ‘glue’ between and Pyfda and MyHDL filter blocks.
So, why do we need to integrate and how do we go about it?
As discussed in earlier posts, the idea is to provide a workflow in Pyfda that automates the process of Implementing a fixpoint filter in VHDL / Verilog, and verify the correct performance in a digital design environment. MyHDL based...
Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This blog post presents the progress made up to week 5 in my GSoC project “Digital Filter blocks and their integration in PyFDA”. Progress was made in two areas of the project.
This post will primarily discuss filter block implementation. The interface will be discussed in a later post once further progress is made.
Direct form-I FIR filterThe equation specifies the direct form I...
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Last time, we talked about error correction and detection, covering some basics like Hamming distance, CRCs, and Hamming codes. If you are new to this topic, I would strongly suggest going back to read that article before this one.
This time we are going to cover Reed-Solomon codes. (I had meant to cover this topic in Part XV, but the article was getting to be too long, so I’ve split it roughly in half.) These are one of the workhorses of error-correction, and they are used in...
Linear Feedback Shift Registers for the Uninitiated, Part XV: Error Detection and Correction
Last time, we talked about Gold codes, a specially-constructed set of pseudorandom bit sequences (PRBS) with low mutual cross-correlation, which are used in many spread-spectrum communications systems, including the Global Positioning System.
This time we are wading into the field of error detection and correction, in particular CRCs and Hamming codes.
Ernie, You Have a Banana in Your EarI have had a really really tough time writing this article. I like the...
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.
I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...
Digital PLL’s, Part 3 – Phase Lock an NCO to an External Clock
Sometimes you may need to phase-lock a numerically controlled oscillator (NCO) to an external clock that is not related to the system clocks of your ASIC or FPGA. This situation is shown in Figure 1. Assuming your system has an analog-to-digital converter (ADC) available, you can sync to the external clock using the scheme shown in Figure 2. This time-domain PLL model is similar to the one presented in Part 1 of this series on digital PLL’s [1]. In that PLL, we...
Back from Embedded World 2019 - Funny Stories and Live-Streaming Woes
When the idea of live-streaming parts of Embedded World came to me, I got so excited that I knew I had to make it happen. I perceived the opportunity as a win-win-win-win.
- win #1 - Engineers who could not make it to Embedded World would be able to sample the huge event,
- win #2 - The organisation behind EW would benefit from the extra exposure
- win #3 - Lecturers and vendors who would be live-streamed would reach a (much) larger audience
- win #4 - I would get...
Digital PLL's -- Part 1
1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.
One application of the DPLL is to recover the timing in a digital...
An s-Plane to z-Plane Mapping Example
While surfing around the Internet recently I encountered the 's-plane to z-plane mapping' diagram shown in Figure 1. At first I thought the diagram was neat because it's a good example of the old English idiom: "A picture is worth a thousand words." However, as I continued to look at Figure 1 I began to detect what I believe are errors in the diagram.
Reader, please take a few moments to see if you detect any errors in Figure 1.
...Python scipy.signal IIR Filter Design
Introduction
The following is an introduction on how to design an infinite impulse response (IIR) filters using the Python scipy.signal package. This post, mainly, covers how to use the scipy.signal package and is not a thorough introduction to IIR filter design. For complete coverage of IIR filter design and structure see one of the references.
Filter SpecificationBefore providing some examples lets review the specifications for a filter design. A filter...
Wavelets II - Vanishing Moments and Spectral Factorization
In the previous blog post I described the workings of the Fast Wavelet Transform (FWT) and how wavelets and filters are related. As promised, in this article we will see how to construct useful filters. Concretely, we will find a way to calculate the Daubechies filters, named after Ingrid Daubechies, who invented them and also laid much of the mathematical foundations for wavelet analysis.
Besides the content of the last post, you should be familiar with basic complex algebra, the...
Frequency Dependence in Free Space Propagation
Introduction
It seems to be fairly common knowledge, even among practicing professionals, that the efficiency of propagation of wireless signals is frequency dependent. Generally it is believed that lower frequencies are desirable since pathloss effects will be less than they would be at higher frequencies. As evidence of this, the Friis Transmission Equation[i] is often cited, the general form of which is usually written as:
Pr = Pt Gt Gr ( λ / 4πd )2 (1)
where the...
The Number 9, Not So Magic After All
This blog is not about signal processing. Rather, it discusses an interesting topic in number theory, the magic of the number 9. As such, this blog is for people who are charmed by the behavior and properties of numbers.
For decades I've thought the number 9 had tricky, almost magical, qualities. Many people feel the same way. I have a book on number theory, whose chapter 8 is titled "Digits — and the Magic of 9", that discusses all sorts of interesting mathematical characteristics of the...
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Last time, we talked about error correction and detection, covering some basics like Hamming distance, CRCs, and Hamming codes. If you are new to this topic, I would strongly suggest going back to read that article before this one.
This time we are going to cover Reed-Solomon codes. (I had meant to cover this topic in Part XV, but the article was getting to be too long, so I’ve split it roughly in half.) These are one of the workhorses of error-correction, and they are used in...
Design IIR Highpass Filters
This post is the fourth in a series of tutorials on IIR Butterworth filter design. So far we covered lowpass [1], bandpass [2], and band-reject [3] filters; now we’ll design highpass filters. The general approach, as before, has six steps:
Find the poles of a lowpass analog prototype filter with Ωc = 1 rad/s. Given the -3 dB frequency of the digital highpass filter, find the corresponding frequency of the analog highpass filter (pre-warping). Transform the...Music/Audio Signal Processing
Greetings,
This is my blog from the point of view of a music/audio DSP research engineer / educator. It is informal and largely nontechnical because nearly everything I have to say about signal processing is (or will be) somewhere in my four-book series: Mathematics of DFT with Audio Applications, Introduction to Digital Filters, Physical Audio Signal Processing and
Optimizing the Half-band Filters in Multistage Decimation and Interpolation
This blog discusses a not so well-known rule regarding the filtering in multistage decimation and interpolation by an integer power of two. I'm referring to sample rate change systems using half-band lowpass filters (LPFs) as shown in Figure 1. Here's the story.
Figure 1: Multistage decimation and interpolation using half-band filters.
Multistage Decimation – A Very Brief ReviewFigure 2(a) depicts the process of decimation by an integer factor D. That...
Design IIR Bandpass Filters
In this post, I present a method to design Butterworth IIR bandpass filters. My previous post [1] covered lowpass IIR filter design, and provided a Matlab function to design them. Here, we’ll do the same thing for IIR bandpass filters, with a Matlab function bp_synth.m. Here is an example function call for a bandpass filter based on a 3rd order lowpass prototype:
N= 3; % order of prototype LPF fcenter= 22.5; % Hz center frequency, Hz bw= 5; ...Noise shaping
eywords: Quantization noise; noise shaping
A brief introduction to noise shaping, with firm resolve not to miss the forest for the trees. We may still stumble over some assorted roots. Matlab example code is included.
QuantizationFig. 1 shows a digital signal that is reduced to a lower bit width, for example a 16 bit signal being sent to a 12 bit digital-to-analog converter. Rounding to the nearest output value is obviously the best that can be done to minimize the error of each...
TCP/IP interface (Matlab/Octave)
Communicate with measurement instruments via Ethernet (no-toolbox-Matlab or Octave)
PurposeMeasurement automation is digital signal processing in a wider sense: Getting a digital signal from an analog world usually involves some measurement instruments, for example a spectrum analyzer. Modern instruments, and also many off-the-shelf prototyping boards such as FPGA cards [1] or microcontrollers [2] are able to communicate via Ethernet. Here, I provide some basic mex-functions (compiled C...
Round Round Get Around: Why Fixed-Point Right-Shifts Are Just Fine
Today’s topic is rounding in embedded systems, or more specifically, why you don’t need to worry about it in many cases.
One of the issues faced in computer arithmetic is that exact arithmetic requires an ever-increasing bit length to avoid overflow. Adding or subtracting two 16-bit integers produces a 17-bit result; multiplying two 16-bit integers produces a 32-bit result. In fixed-point arithmetic we typically multiply and shift right; for example, if we wanted to multiply some...
How Discrete Signal Interpolation Improves D/A Conversion
This blog post is also available in pdf format. Download here.Earlier this year, for the Linear Audio magazine, published in the Netherlands whose subscribers are technically-skilled hi-fi audio enthusiasts, I wrote an article on the fundamentals of interpolation as it's used to improve the performance of analog-to-digital conversion. Perhaps that article will be of some value to the subscribers of dsprelated.com. Here's what I wrote:
We encounter the process of digital-to-analog...
Computing Large DFTs Using Small FFTs
It is possible to compute N-point discrete Fourier transforms (DFTs) using radix-2 fast Fourier transforms (FFTs) whose sizes are less than N. For example, let's say the largest size FFT software routine you have available is a 1024-point FFT. With the following trick you can combine the results of multiple 1024-point FFTs to compute DFTs whose sizes are greater than 1024.
The simplest form of this idea is computing an N-point DFT using two N/2-point FFT operations. Here's how the trick...
The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase
This blog discusses a little-known filter characteristic that enables real- and complex-coefficient tapped-delay line FIR filters to exhibit linear phase behavior. That is, this blog answers the question:
What is the constraint on real- and complex-valued FIR filters that guarantee linear phase behavior in the frequency domain?I'll declare two things to convince you to continue reading.
Declaration# 1: "That the coefficients must be symmetrical" is not a correct
An s-Plane to z-Plane Mapping Example
While surfing around the Internet recently I encountered the 's-plane to z-plane mapping' diagram shown in Figure 1. At first I thought the diagram was neat because it's a good example of the old English idiom: "A picture is worth a thousand words." However, as I continued to look at Figure 1 I began to detect what I believe are errors in the diagram.
Reader, please take a few moments to see if you detect any errors in Figure 1.
...Sinusoidal Frequency Estimation Based on Time-Domain Samples
The topic of estimating a noise-free real or complex sinusoid's frequency, based on fast Fourier transform (FFT) samples, has been presented in recent blogs here on dsprelated.com. For completeness, it's worth knowing that simple frequency estimation algorithms exist that do not require FFTs to be performed . Below I present three frequency estimation algorithms that use time-domain samples, and illustrate a very important principle regarding so called "exact"...
DSPRelated faster than ever!
if you are visiting DSPRelated.com on a regular basis, you should observe that the site loads significantly faster in your browser than it used to, especially if you are in Europe or in Asia. The main reason for this is that I am now using Amazon's CloudFront service for the delivery of most static content on DSPRelated.com (images, javascripts, css). The cloudFront service automatically detects the location of a visitor and will deliver the static content from the server...
New Papers / Theses Section
The new 'Papers & Theses' section is now online: http://www.dsprelated.com/documents.phpThe idea is to list and organize in one place as many DSP related dissertations (PhD & Masters) and papers/articles as possible.If you are the author of a thesis or paper and would like to have it listed on DSPRelated.com, please follow these steps:- Make sure that you are allowed to share the document online (copyright).- If you don't already have one, make a 'pdf' copy of your document. ...
New Blog Section!
By now, chances are you have noticed the new blogs section (you are actually in it right now!).
Following an email I sent to the members of the site, a few weeks ago, asking for dsp engineers willing to blog here, I received around 50 propositions. I have selected an initial set of 10 bloggers (that I will soon introduce into a seperate post) and I am currently in the process of creating their accounts. Markus and Parth have already...
New Discussion Group: DSP & FPGA
I have just created a new discussion group for engineers implementing DSP functions on FPGAs. The creation of this group has been on my todo list for a long time. If you want to join the group, send a blank email to: fpgadsp-subscribe@yahoogroups.com
As usual, it should take a few weeks before there are enough members for interesting discussions to get started.
