Interpolation Basics

Neil Robertson August 20, 201915 comments

This article covers interpolation basics, and provides a numerical example of interpolation of a time signal.  Figure 1 illustrates what we mean by interpolation.  The top plot shows a continuous time signal, and the middle plot shows a sampled version with sample time Ts.  The goal of interpolation is to increase the sample rate such that the new (interpolated) sample values are close to the values of the continuous signal at the sample times [1].  For example, if...

A Two Bin Solution

Cedron Dawg July 12, 2019

This is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by showing an implementation of how the parameters of a real pure tone can be calculated from just two DFT bin values. The equations from previous articles are used in tandem to first calculate the frequency, and then calculate the amplitude and phase of the tone. The approach works best when the tone is between the two DFT bins in terms of frequency.

The Coding...

Reduced-Delay IIR Filters

Rick Lyons July 4, 201919 comments

This blog gives the results of a preliminary investigation of reduced-delay (reduced group delay) IIR filters based on my understanding of the concepts presented in a recent interesting blog by Steve Maslen [1].

Development of a Reduced-Delay 2nd-Order IIR Filter

Maslen's development of a reduced-delay 2nd-order IIR filter begins with a traditional prototype filter, HTrad, shown in Figure 1(a). The first modification to the prototype filter is to extract the b0 feedforward coefficient...

Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers

Steve Maslen June 18, 201917 comments
This final article in the series will look at -ve latency DSP and how it can be used to cancel the unwanted delays in sampled-data systems due to such factors as Nyquist filtering, ADC acquisition, DSP/FPGA algorithm computation time, DAC reconstruction and circuit propagation delays.

Some applications demand zero-latency or zero unwanted latency signal processing. Negative latency DSP may sound like the stuff of science fiction or broken physics but the arrangement as...

A Direct Digital Synthesizer with Arbitrary Modulus

Neil Robertson June 3, 20195 comments

Suppose you have a system with a 10 MHz sample clock, and you want to generate a sampled sinewave at any frequency below 5 MHz on 500 kHz spacing; i.e., 0.5, 1.0, 1.5, … MHz.  In other words, f = k*fs/20, where k is an integer and fs is sample frequency.  This article shows how to do this using a simple Direct Digital Synthesizer (DDS) with a look-up table that is at most 20 entries long.   We’ll also demonstrate a Quadrature-output DDS.  A note on...

Somewhat Off Topic: Deciphering Transistor Terminology

Rick Lyons May 28, 20193 comments

I recently learned something mildly interesting about transistors, so I thought I'd share my new knowledge with you folks. Figure 1 shows a p-n-p transistor comprising a small block of n-type semiconductor sandwiched between two blocks of p-type semiconductor.

The terminology of "emitter" and "collector" seems appropriate, but did you ever wonder why the semiconductor block in the center is called the "base"? The word base seems inappropriate because the definition of the word base is:...

Reducing IIR Filter Computational Workload

Rick Lyons May 24, 20195 comments

This blog describes a straightforward method to significantly reduce the number of necessary multiplies per input sample of traditional IIR lowpass and highpass digital filters.

Reducing IIR Filter Computations Using Dual-Path Allpass Filters

We can improve the computational speed of a lowpass or highpass IIR filter by converting that filter into a dual-path filter consisting of allpass filters as shown in Figure 1.


A Lesson In Engineering Humility

Rick Lyons May 20, 20199 comments

Let's assume you were given the task to design and build the 12-channel telephone transmission system shown in Figure 1.

Figure 1

At a rate of 8000 samples/second, each telephone's audio signal is sampled and converted to a 7-bit binary sequence of pulses. The analog signals at Figure 1's nodes A, B, and C are presented in Figure 2.

Figure 2

I'm convinced that some of you subscribers to this web site could accomplish such a design & build task....

IIR Bandpass Filters Using Cascaded Biquads

Neil Robertson April 20, 201911 comments

In an earlier post [1], we implemented lowpass IIR filters using a cascade of second-order IIR filters, or biquads.  

This post provides a Matlab function to do the same for Butterworth bandpass IIR filters.  Compared to conventional implementations, bandpass filters based on biquads are less sensitive to coefficient quantization [2].  This becomes important when designing narrowband filters.

A biquad section block diagram using the Direct Form II structure [3,4] is...

Controlling a DSP Network's Gain: A Note For DSP Beginners

Rick Lyons March 29, 201922 comments

This blog briefly discusses a topic well-known to experienced DSP practitioners but may not be so well-known to DSP beginners. The topic is the proper way to control a digital network's gain. Digital Network Gain Control Figure 1 shows a collection of networks I've seen, in the literature of DSP, where strict gain control is implemented.

              FIGURE 1. Examples of digital networks whose initial operations are input signal...

Simplest Calculation of Half-band Filter Coefficients

Neil Robertson November 20, 20179 comments

Half-band filters are lowpass FIR filters with cut-off frequency of one-quarter of sampling frequency fs and odd symmetry about fs/4  [1]*.  And it so happens that almost half of the coefficients are zero.  The passband and stopband bandwiths are equal, making these filters useful for decimation-by-2 and interpolation-by-2.  Since the zero coefficients make them computationally efficient, these filters are ubiquitous in DSP systems.

Here we will compute half-band...

Frequency-Domain Periodicity and the Discrete Fourier Transform

Eric Jacobsen August 6, 2012


Some of the better understood aspects of time-sampled systems are the limitations and requirements imposed by the Nyquist sampling theorem [1]. Somewhat less understood is the periodic nature of the spectra of sampled signals. This article provides some insights into sampling that not only explain the periodic nature of the sampled spectrum, but aliasing, bandlimited sampling, and the so-called "super-Nyquist" or IF sampling. The approaches taken here include both mathematical...

A Differentiator With a Difference

Rick Lyons November 3, 200710 comments

Some time ago I was studying various digital differentiating networks, i.e., networks that approximate the process of taking the derivative of a discrete time-domain sequence. By "studying" I mean that I was experimenting with various differentiating filter coefficients, and I discovered a computationally-efficient digital differentiator. A differentiator that, for low fequency signals, has the power of George Foreman's right hand! Before I describe this differentiator, let's review a few...

Time Machine, Anyone?

Andor Bariska March 7, 20086 comments

Abstract: Dispersive linear systems with negative group delay have caused much confusion in the past. Some claim that they violate causality, others that they are the cause of superluminal tunneling. Can we really receive messages before they are sent? This article aims at pouring oil in the fire and causing yet more confusion :-).

PDF version of this article.


In this article we reproduce the results of a physical experiment...

Optimizing the Half-band Filters in Multistage Decimation and Interpolation

Rick Lyons January 4, 201616 comments

This blog discusses a not so well-known rule regarding the filtering in multistage decimation and interpolation by an integer power of two. I'm referring to sample rate change systems using half-band lowpass filters (LPFs) as shown in Figure 1. Here's the story.

Figure 1: Multistage decimation and interpolation using half-band filters.

Multistage Decimation – A Very Brief Review

Figure 2(a) depicts the process of decimation by an integer factor D. That...

An s-Plane to z-Plane Mapping Example

Rick Lyons September 24, 20169 comments

While surfing around the Internet recently I encountered the 's-plane to z-plane mapping' diagram shown in Figure 1. At first I thought the diagram was neat because it's a good example of the old English idiom: "A picture is worth a thousand words." However, as I continued to look at Figure 1 I began to detect what I believe are errors in the diagram.

Reader, please take a few moments to see if you detect any errors in Figure 1.


Plotting Discrete-Time Signals

Neil Robertson September 15, 20195 comments

A discrete-time sinusoid can have frequency up to just shy of half the sample frequency.  But if you try to plot the sinusoid, the result is not always recognizable.  For example, if you plot a 9 Hz sinusoid sampled at 100 Hz, you get the result shown in the top of Figure 1, which looks like a sine.  But if you plot a 35 Hz sinusoid sampled at 100 Hz, you get the bottom graph, which does not look like a sine when you connect the dots.  We typically want the plot of a...

The Number 9, Not So Magic After All

Rick Lyons October 1, 20146 comments

This blog is not about signal processing. Rather, it discusses an interesting topic in number theory, the magic of the number 9. As such, this blog is for people who are charmed by the behavior and properties of numbers.

For decades I've thought the number 9 had tricky, almost magical, qualities. Many people feel the same way. I have a book on number theory, whose chapter 8 is titled "Digits — and the Magic of 9", that discusses all sorts of interesting mathematical characteristics of the...

Accurate Measurement of a Sinusoid's Peak Amplitude Based on FFT Data

Rick Lyons December 14, 201112 comments

There are two code snippets associated with this blog post:

Flat-Top Windowing Function for the Accurate Measurement of a Sinusoid's Peak Amplitude Based on FFT Data


Testing the Flat-Top Windowing Function

This blog discusses an accurate method of estimating time-domain sinewave peak amplitudes based on fast Fourier transform (FFT) data. Such an operation sounds simple, but the scalloping loss characteristic of FFTs complicates the process. We eliminate that complication by...

The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase

Rick Lyons August 18, 201517 comments

This blog discusses a little-known filter characteristic that enables real- and complex-coefficient tapped-delay line FIR filters to exhibit linear phase behavior. That is, this blog answers the question:

What is the constraint on real- and complex-valued FIR filters that guarantee linear phase behavior in the frequency domain?

I'll declare two things to convince you to continue reading.

Declaration# 1: "That the coefficients must be symmetrical" is not a correct

New Code Sharing Section & Reward Program for Contributors!

Stephane Boucher October 15, 201012 comments

UPDATE (11/02/2010): The code section is now live.

UPDATE 2 (01/31/2011): The reward program has changed.  A flat fee of $20 per code snippet submitted will now be paid.  


I am very happy to finally announce the imminent launch of the new code sharing section.  My vision for this new section is a rich library of high quality code snippets for the DSP community, from processor specific functions to Matlab or Scilab routines, from the simplest filter...

50,000th Member Announced!

Stephane Boucher January 11, 2010

In my last post, I wrote that was about to reach the 50,000 members mark.  Well, I am very happy to announce that it happened during the holidays, and the lucky person is Charlie Tsai from Taiwan.  Charlie is an assistant professor in the Department of Electrical Engineering at the National Central University in Taiwan where he teaches the "Biomedical Signal Processing" class.  He is also the advisor of the

Almost 50,000 Members!

Stephane Boucher November 26, 20091 comment

I am very happy to announce that will reach the 50,000 registered members mark before the end of 2009. To celebrate this milestone, I will buy a BMW 5 to the 50,000th person to register (please make sure to confirm you email address to activate your registration).  Please read the fine prints after the picture.

I am just having fun here and it's not even April's fool day.  The 50,000th member won't get a BMW (I wish I could offer it!),...

DSPRelated faster than ever!

Stephane Boucher March 2, 20094 comments

if you are visiting on a regular basis, you should observe that the site loads significantly faster in your browser than it used to, especially if you are in Europe or in Asia.  The main reason for this is that I am now using Amazon's CloudFront service for the delivery of most static content on (images, javascripts, css).   The cloudFront service automatically detects the location of a visitor and will deliver the static content from the server...

New Papers / Theses Section

Stephane Boucher March 21, 20081 comment

The new 'Papers & Theses' section is now online: idea is to list and organize in one place as many DSP related dissertations (PhD & Masters) and papers/articles as possible.If you are the author of a thesis or paper and would like to have it listed on, please follow these steps:- Make sure that you are allowed to share the document online (copyright).- If you don't already have one, make a 'pdf' copy of your document. ...

New Blog Section!

Stephane Boucher September 19, 20072 comments

By now, chances are you have noticed the new blogs section (you are actually in it right now!).

Following an email I sent to the members of the site, a few weeks ago, asking for dsp engineers willing to blog here, I received around 50 propositions. I have selected an initial set of 10 bloggers (that I will soon introduce into a seperate post) and I am currently in the process of creating their accounts. Markus and Parth have already...

New Discussion Group: DSP & FPGA

Stephane Boucher September 11, 20078 comments

I have just created a new discussion group for engineers implementing DSP functions on FPGAs. The creation of this group has been on my todo list for a long time. If you want to join the group, send a blank email to:

As usual, it should take a few weeks before there are enough members for interesting discussions to get started.