Design IIR Butterworth Filters Using 12 Lines of Code
Build a working lowpass IIR Butterworth filter from first principles in just 12 lines of Matlab using Neil Robertson's butter_synth.m. The post walks through the analog prototype poles, frequency pre-warping, bilinear transform pole mapping, adding N zeros at z = -1, and gain normalization so the result matches Matlab's built-in butter function. It's a compact, hands-on guide with clear formulas and code.
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
Self-calibration is the missing piece that turns this mixed-signal hardware from a prototype into a usable instrument. In this installment, the author lays out how the board will measure itself, generate reference signals, and verify ADC and DAC behavior before the low-latency control firmware is built. The result is a practical framework for evaluation, production test, and routine self-test.
Simplest Calculation of Half-band Filter Coefficients
Half-band FIR filters put the cutoff at one-quarter of the sampling rate, and nearly half their coefficients are exactly zero, which makes them highly efficient for decimation-by-2 and interpolation-by-2. This post shows the straightforward window-method derivation of half-band coefficients from the ideal sinc impulse response, providing a clear, hands-on explanation for engineers learning filter design. It also points to equiripple options such as Matlab's firhalfband and a later Parks-McClellan implementation.
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.
This installment digs into practical FPGA choices and board-level issues for a low-latency, floating-point feedback controller. It compares a Cyclone V implementation against an older SHARC-based design, quantifies the tradeoff between raw DSP resources and cycle latency, and calls out Gotchas found on the BeMicro CV A9 evaluation card. Engineers get concrete prompts for where to optimize: clocking, DSP-block use, I/O standards, and algorithm partitioning.
Improved Three Bin Exact Frequency Formula for a Pure Real Tone in a DFT
Cedron Dawg extends his two-bin exact frequency formulas to a three-bin DFT estimator for a pure real tone, and presents the derivation in computational order for practical use. The method splits complex bin values into real and imaginary parts, forms vectors A, B, and C, applies a sqrt(2) variance rescaling, and computes frequency via a projection-based closed form. Numerical tests compare the new formula to prior work and show improved accuracy when the tone lies between bins.
There's No End to It -- Matlab Code Plots Frequency Response above the Unit Circle
If you want a fresh way to inspect a digital filter, this post introduces plotfil3d, a compact MATLAB function that wraps the magnitude response around the unit circle in the Z-plane so you can view it in 3D. It uses freqz to compute H(z) in dB for N points and accepts an optional azimuth to change the viewing angle; the code is provided in the appendix.
There and Back Again: Time of Flight Ranging between Two Wireless Nodes
Conventional timestamping seems too coarse for centimeter-level RF ranging, yet many products claim and deliver that precision. This post unpacks the fundamentals behind high-resolution wireless ranging, contrasting common RF approaches such as RSSI, ToA, PoA, TDoA, and AoA. It also explains how device timestamps and counter registers work, giving engineers a practical starting point for implementing or evaluating time-of-flight ranging systems.
Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware
This installment follows the hardware from concept to first power-up for a low-latency feedback controller and arbitrary circuit emulator. It walks through the practical engineering steps, from requirements, block diagrams, and issue tracking to component selection, simulation, PCB planning, purchasing, and staged bring-up. The result is a realistic look at how careful due diligence and a few trade-offs turned a research idea into working evaluation hardware.
Online DSP Classes: Why Such a High Dropout Rate?
Rick Lyons digs into a startling statistic: online DSP courses reported a 97% dropout rate. He argues the main culprits are math-heavy curricula that overwhelm beginners and rigid, non-self-paced schedules that demand sustained 8-10+ hours per week. Rick urges course creators to rethink pacing and mathematical depth to improve completion rates and student engagement.
Two Bin Exact Frequency Formulas for a Pure Real Tone in a DFT
Cedron Dawg derives exact, closed-form frequency formulas that recover a pure real tone from just two DFT bins using a geometric vector approach. The method projects bin-derived vectors onto a plane orthogonal to a constraint vector to eliminate amplitude and phase, yielding an explicit cos(alpha) estimator; a small adjustment improves noise performance so the estimator rivals and slightly betters earlier two-bin methods.
Some Observations on Comparing Efficiency in Communication Systems
Efficiency in wireless communications is a multidimensional tradeoff, not a single metric. Eric Jacobsen walks through how transmit power, channel bandwidth, and FEC choices interact, showing when to judge systems by Eb/No versus SNR and how to read bandwidth-efficiency plots. The piece highlights a practical "sweet spot" of FEC code rates where power, spectrum, and decoder complexity are balanced, helping engineers choose MCS sets wisely.
Engineering the Statistics
Statistical analysis can get messy fast when theory and MATLAB simulations refuse to agree. This post shares a graduate student’s hard-earned shortcuts for taming random variables, from deriving a CDF or moments to using Gaussian or Gamma approximations, and falling back on Chernoff bounds when the exact PDF stays out of reach.
FIR sideways (interpolator polyphase decomposition)
Markus Nentwig presents a compact way to implement a symmetric FIR interpolator by rethinking the usual tapped delay line. The 1:3 polyphase example uses separate delay lines per coefficient to skip multiplies on known zeros and exploit symmetry, cutting multiplications substantially; a Matlab/Octave demo and notes on ASIC-friendly implementation are included to help evaluate real-world cost tradeoffs.
Data Types for Control & DSP
Control engineers often default to double precision, but Tim Wescott shows that choice can waste CPU cycles on embedded targets. He separates numeric representation into floating point, integer, and fixed-point, then walks through the tradeoffs, including quantization, overflow, and performance. A concrete PID example highlights why integrator precision and ADC scaling should drive your choice of data type rather than habit.
The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase
Rick Lyons pulls back the curtain on a little-known coefficient constraint that makes complex-coefficient FIR filters exhibit linear phase. Rather than simple symmetry of real coefficients, the key is a conjugate-reflection relation involving the filter phase at DC, which collapses to ordinary symmetry for real taps. The post includes derivations, intuition using the inverse DTFT, and a Matlab example to verify the result.
Compute Modulation Error Ratio (MER) for QAM
Neil Robertson shows how to define and compute Modulation Error Ratio (MER) for QAM using a simplified baseband model and decision-slice errors. The post derives per-symbol and averaged MER formulas, explains when MER tracks carrier-to-noise ratio under AWGN and matched root-Nyquist filters, and provides example Pav values for QAM-16 and QAM-64 plus a Matlab script and practical tips.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization
A Matlab toolbox streamlines the design and optimization of multi-stage decimation filters for sigma-delta ADCs. MSD-toolbox automates stage-count and decimation-factor selection, generates Parks-McClellan equiripple FIR coefficients, and iteratively selects coefficient quantization to meet in-band noise constraints. It accepts sigma-delta bitstream stimuli for spectral and intra-stage analysis, includes cost estimation routines, and is published open-source on MathWorks with examples and a dissertation reference.
Demonstrating the Periodic Spectrum of a Sampled Signal Using the DFT
This post makes a basic DSP principle tangible by computing the DFT over an extended set of bins and plotting the results. It demonstrates that a sampled signal's spectrum repeats every sampling rate, explains the k-to-frequency mapping, and contrasts common bin ranges such as 0..N-1 and -N/2..N/2-1. The write-up also highlights symmetry for real sequences and recommends using the FFT for efficiency.
Modelling a Noisy Communication Signal in MATLAB for the Analog to Digital Conversion Process
Practical signal modeling treats receiver noise as a fixed power source, not something tied to the transmitted waveform. Parth demonstrates why using MATLAB's awgn(sig,SNR,'measured') can misrepresent an analog front end and provides a short function that scales your signal so the added AWGN produces the desired receiver noise variance. This prepares realistic inputs for upcoming ADC simulations.
How the Cooley-Tukey FFT Algorithm Works | Part 4 - Twiddle Factors
The beauty of the FFT algorithm is that it does the same thing over and over again. It treats every stage of the calculation in exactly the same way. However, this. “one-size-fits-all” approach, although elegant and simple, causes a problem. It misaligns samples and introduces phase distortions during each stage of the algorithm. To overcome this, we need Twiddle Factors, little phase correction factors that push things back into their correct positions before continuing onto the next stage.
The Discrete Fourier Transform as a Frequency Response
Neil Robertson shows that the discrete frequency response H(k) of an FIR filter is exactly the DFT of its impulse response h(n). He derives the continuous H(ω) and discrete H(k) using complex exponentials for a four-tap FIR, then replaces h(n) with x(n) to recover the general DFT formula. The post keeps the math simple and calls out topics left for separate treatment, such as windowing and phase.
Linear Feedback Shift Registers for the Uninitiated, Part XIII: System Identification
Jason Sachs shows how the output of a linear feedback shift register can be used for active system identification, not just spread-spectrum testing. The article compares traditional sine-wave probing with LFSR-based PRBS methods, demonstrates a worked Ra-Rb-C example, and unpacks practical issues such as reflected pseudonoise, ADC quantization, sample counts, and noise-shaping tricks to improve estimates.
Reduced-Delay IIR Filters
Rick Lyons investigates a simple 2nd-order IIR modification that reduces passband group delay by just under one sample, inspired by Steve Maslen's reduced-delay concept. He walks through the conversion steps and compares z-plane, magnitude, and group-delay plots for Butterworth, elliptic, and Chebyshev prototypes, showing how zeros shift and stopband attenuation degrades. A linked PDF extends the study to 1st-, 3rd-, and 4th-order cases so you can follow the tradeoffs.
SEGGER's 25th Anniversary Video
Stephane Boucher spent a week at SEGGER's headquarters and distilled that visit into a tight, two-minute 25th anniversary video. The post highlights rising production value, thanks to softbox lighting and a two-camera setup that allows seamless wide-to-tight cuts and emotional close-ups. Stephane invites readers to watch full screen, leave feedback and thumbs-up on YouTube, and suggests future coverage like product launches or companies with happy engineers.
Simple Concepts Explained: Fixed-Point
Fixed-point is the bridge between real-world values and integer arithmetic, and this post makes that bridge tangible with a hands-on ADC-to-gain example. It walks through mapping voltages to Q-format integers, choosing gain resolution in bits, and how multiplication adds bit growth and produces quantization error. Read it to build intuition for practical fixed-point choices when implementing DSP on FPGA or ASIC.
Summary of ROC Rules
This is a very short guide on how to find all possible outcomes of a system where Region of Convergence (ROC) and the original signal is not known.
Differentiating and integrating discrete signals
Think DSP's new chapter digs into discrete differentiation and integration, using first differences, convolution, and FFTs to compare time and frequency domain views. The author reproduces diff via convolution then explores cumsum as its inverse and runs into two puzzling mismatches: noisy FFT amplitude ratios for nonperiodic data, and a time-domain convolution that does not reproduce cumsum for a sawtooth despite matching frequency responses. The post includes IPython notebooks and invites troubleshooting.
Curse you, iPython Notebook!
Christopher Felton shares a cautionary tale about losing an ipython 0.12 notebook session after assuming the browser would save his interactive edits. He explains that notebooks at the time required clicking the top Save button to persist sessions, and autosave was not yet available. He recommends basing interactive work on scripts, saving often, and testing export behavior to avoid redoing text, LaTeX, and plots.
A Fast Real-Time Trapezoidal Rule Integrator
Rick Lyons presents a compact, recursive real-time Trapezoidal Rule integrator that computes N-sample discrete integration using only four arithmetic operations per input sample. The proposed network yields a finite-length, linear-phase impulse response with constant group delay (N-1)/2 and cuts substantial computation compared with a tapped-delay implementation, making it useful for speeding Romberg-based digital filters.
