Should DSP Undergraduate Students Study z-Transform Regions of Convergence?

Rick Lyons September 14, 201613 comments

Not long ago I presented my 3-day DSP class to a group of engineers at Tektronix Inc. in Beaverton Oregon [1]. After I finished covering my material on IIR filters' z-plane pole locations and filter stability, one of the Tektronix engineers asked a question similar to:

     "I noticed that you didn't discuss z-plane regions of      convergence here. In my undergraduate DSP class we      spent a lot of classroom and homework time on the  ...


Implementing Impractical Digital Filters

Rick Lyons July 19, 20162 comments

This blog discusses a problematic situation that can arise when we try to implement certain digital filters. Occasionally in the literature of DSP we encounter impractical digital IIR filter block diagrams, and by impractical I mean block diagrams that cannot be implemented. This blog gives examples of impractical digital IIR filters and what can be done to make them practical.

Implementing an Impractical Filter: Example 1

Reference [1] presented the digital IIR bandpass filter...


An Astounding Digital Filter Design Application

Rick Lyons July 7, 201613 comments

I've recently encountered a digital filter design application that astonished me with its design flexibility, capability, and ease of use. The software is called the "ASN Filter Designer." After experimenting with a demo version of this filter design software I was so impressed that I simply had publicize it to the subscribers here on dsprelated.com.

What I Liked About the ASN Filter Designer

With typical filter design software packages the user enters numerical values for the...


Digital PLL's -- Part 2

Neil Robertson June 15, 20165 comments

In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter.  Now let’s look at this PLL in the Z-domain [1, 2].  We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ. 

Having a Z-domain model of the DPLL will allow us to do three things:

Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural...

The Swiss Army Knife of Digital Networks

Rick Lyons June 13, 20168 comments

This blog describes a general discrete-signal network that appears, in various forms, inside so many DSP applications. 

Figure 1 shows how the network's structure has the distinct look of a digital filter—a comb filter followed by a 2nd-order recursive network. However, I do not call this useful network a filter because its capabilities extend far beyond simple filtering. Through a series of examples I've illustrated the fundamental strength of this Swiss Army Knife of digital networks...


Digital PLL's -- Part 1

Neil Robertson June 7, 201622 comments
1. Introduction

Figure 1.1 is a block diagram of a digital PLL (DPLL).  The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal.  The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance.  The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.

One application of the DPLL is to recover the timing in a digital...


Peak to Average Power Ratio and CCDF

Neil Robertson May 17, 20164 comments

Peak to Average Power Ratio (PAPR) is often used to characterize digitally modulated signals.  One example application is setting the level of the signal in a digital modulator.  Knowing PAPR allows setting the average power to a level that is just low enough to minimize clipping.

However, for a random signal, PAPR is a statistical quantity.  We have to ask, what is the probability of a given peak power?  Then we can decide where to set the average...


Filter a Rectangular Pulse with no Ringing

Neil Robertson May 12, 201610 comments

To filter a rectangular pulse without any ringing, there is only one requirement on the filter coefficients:  they must all be positive.  However, if we want the leading and trailing edge of the pulse to be symmetrical, then the coefficients must be symmetrical.  What we are describing is basically a window function.

Consider a rectangular pulse 32 samples long with fs = 1 kHz.  Here is the Matlab code to generate the pulse:

N= 64; fs= 1000; % Hz sample...

Data Types for Control & DSP

Tim Wescott April 26, 20166 comments

There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.

I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code.  Numerically, this should work for most control problems, but it can be an extravagant use of processor resources.  There ought to be a better way to determine what precision you need...


PID Without a PhD

Tim Wescott April 26, 201614 comments

I both consult and teach in the area of digital control. Through both of these efforts, I have found that while there certainly are control problems that require all the expertise I can bring to bear, there are a great number of control problems that can be solved with the most basic knowledge of simple controllers, without resort to any formal control theory at all.

This article will tell you how to implement a simple controller in software and how to tune it without getting into heavy...


Computing Translated Frequencies in Digitizing and Downsampling Analog Bandpass Signals

Rick Lyons October 31, 20131 comment

In digital signal processing (DSP) we're all familiar with the processes of bandpass sampling an analog bandpass signal and downsampling a digital bandpass signal. The overall spectral behavior of those operations are well-documented. However, mathematical expressions for computing the translated frequency of individual spectral components, after bandpass sampling or downsampling, are not available in the standard DSP textbooks. The following three sections explain how to compute the...


Errata for the book: 'Understanding Digital Signal Processing'

Rick Lyons October 4, 20179 comments
Errata 3rd Ed. International Version.pdfErrata 3rd Ed. International Version.pdf

This blog post provides, in one place, the errata for each of the many different Editions/Printings of my book Understanding Digital Signal Processing.

If you would like the errata for your copy of the book, merely scroll down and click on the appropriate red line below. For the American versions of the various Editions of the book you'll need to know the "Printing Number" of your copy of the...


Computing an FFT of Complex-Valued Data Using a Real-Only FFT Algorithm

Rick Lyons February 9, 20103 comments

Someone recently asked me if I knew of a way to compute a fast Fourier transform (FFT) of complex-valued input samples using an FFT algorithm that accepts only real-valued input data. Knowing of no way to do this, I rifled through my library of hardcopy FFT articles looking for help. I found nothing useful that could be applied to this problem.

After some thinking, I believe I have a solution to this problem. Here is my idea:

Let's say our original input data is the complex-valued sequence...


SEGGER's 25th Anniversary Video

Stephane Boucher July 18, 20172 comments

Chances are you will find this video more interesting to watch if you take five minutes to first read the story of the week I spent at SEGGER's headquarters at the end of June.  

The video is only a little more than 2 minutes long.  If you decide to watch it, make sure to go full screen and I would really love to read your thoughts about it in the comments down bellow.  Do you think a video like this succeeds in making the viewer want to learn more about the company?...


DFT Bin Value Formulas for Pure Real Tones

Cedron Dawg April 17, 20151 comment
Introduction

This is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by deriving an analytical formula for the DFT of pure real tones. The formula is used to explain the well known properties of the DFT. A sample program is included, with its output, to numerically demonstrate the veracity of the formula. This article builds on the ideas developed in my previous two blog articles:


How precise is my measurement?

Sam Shearman March 28, 20183 comments

Some might argue that measurement is a blend of skepticism and faith. While time constraints might make you lean toward faith, some healthy engineering skepticism should bring you back to statistics. This article reviews some practical statistics that can help you satisfy one common question posed by skeptical engineers: “How precise is my measurement?” As we’ll see, by understanding how to answer it, you gain a degree of control over your measurement time.

An accurate, precise...

Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers

Steve Maslen June 18, 201917 comments
This final article in the series will look at -ve latency DSP and how it can be used to cancel the unwanted delays in sampled-data systems due to such factors as Nyquist filtering, ADC acquisition, DSP/FPGA algorithm computation time, DAC reconstruction and circuit propagation delays.

Some applications demand zero-latency or zero unwanted latency signal processing. Negative latency DSP may sound like the stuff of science fiction or broken physics but the arrangement as...


Specifying the Maximum Amplifier Noise When Driving an ADC

Rick Lyons June 9, 20148 comments

I recently learned an interesting rule of thumb regarding the use of an amplifier to drive the input of an analog to digital converter (ADC). The rule of thumb describes how to specify the maximum allowable noise power of the amplifier [1].

The Problem Here's the situation for an ADC whose maximum analog input voltage range is –VRef to +VRef. If we drive an ADC's analog input with an sine wave whose peak amplitude is VP = VRef, the ADC's output signal to noise ratio is maximized. We'll...


Feedback Controllers - Making Hardware with Firmware. Part I. Introduction

Steve Maslen August 22, 2017
Introduction to the topic 

This is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.

  • Part 1: 

The DFT of Finite-Length Time-Reversed Sequences

Rick Lyons December 20, 201910 comments

Recently I've been reading papers on underwater acoustic communications systems and this caused me to investigate the frequency-domain effects of time-reversal of time-domain sequences. I created this blog because there is so little coverage of this topic in the literature of DSP.

This blog reviews the two types of time-reversal of finite-length sequences and summarizes their discrete Fourier transform (DFT) frequency-domain characteristics.

The Two Types of Time-Reversal in DSP

...