DSPRelated.com

A poor man's Simulink

Markus NentwigMarkus Nentwig January 24, 20153 comments

Markus Nentwig built a compact glue layer that embeds NGSPICE into Octave to cosimulate continuous-time circuits and digital control. The article walks through an RC lowpass example, the MEX-based Octave interface, and the breakpoint-driven cosimulation flow, showing how adaptive SPICE integration handles asynchronous and time-triggered events. It presents a practical, low-cost alternative to Simulink for tightly coupled analog-digital system design.


A Complex Variable Detective Story – A Disconnect Between Theory and Implementation

Rick LyonsRick Lyons October 14, 2014

A subtle phase-wrap gotcha turned a clean pencil-and-paper derivation into a software mismatch for a 5-tap FIR filter with complex coefficients. Rick Lyons shows why two algebraically equivalent-looking expressions can disagree in code, and traces the real culprit to angle limits in rectangular-form complex arithmetic. The fix is simple once you see it, but the trap is easy to miss.


The Number 9, Not So Magic After All

Rick LyonsRick Lyons October 1, 20146 comments

Rick Lyons dismantles the mystique around the number 9 by showing its 'magic' stems from our base-10 system rather than any unique numeral power. He walks through classic 9 tricks, including digit-sum divisibility, digital-root behavior, and division patterns, then generalizes them to base-B where digit B-1 plays the same role. The post is a short, playful link between recreational arithmetic and radix thinking.


Sum of Two Equal-Frequency Sinusoids

Rick LyonsRick Lyons September 4, 20146 comments

Rick Lyons exposes a frequent trig mistake and delivers complete closed-form expressions for collapsing two equal-frequency sinusoids into a single sinusoid. Using complex-exponential phasor addition and equating real and imaginary parts, he compiles easy-to-use tables for cosine+cosine, sine+sine, and cosine+sine cases and shows how to derive each form. Engineers get corrected identities and compact derivations useful for analysis and communications.


The DFT Magnitude of a Real-valued Cosine Sequence

Rick LyonsRick Lyons June 17, 201410 comments

Rick Lyons proves a simple but often-missing result: the N-point DFT peak magnitude of a real cosine with an integer number of cycles equals A·N/2. He uses Euler's formula and geometric-series summation, shows a neat shortcut that avoids l'Hôpital's rule, and connects the math to practical fixed-point FFT sizing and overflow prevention on two's-complement hardware. The post also notes conjugate symmetry and the same result for sine inputs.


Specifying the Maximum Amplifier Noise When Driving an ADC

Rick LyonsRick Lyons June 9, 20148 comments

You can quantify how much amplifier noise is acceptable before adding gain actually hurts an ADC's output SNR. Rick Lyons presents a compact rule showing the amplifier input-referred noise power must be less than (1 - 1/α^2) times the ADC's q^2/12 quantization noise power, with Eq. (8) and a pair of figures that make it easy to pick or specify the right amplifier for a given gain α.


Constrained Integer Behavior

Christopher FeltonChristopher Felton May 26, 2014

Overflow and underflow are not always bugs, they can be useful in DSP when fixed-width integers wrap during processing. Christopher Felton demonstrates with moving-average (recursive-windowed-averager) and CIC filter examples how 2's complement wraparound in MyHDL's modbv cancels between an integrator and a comb via pole-zero cancellation. He also covers fixed-point resizing choices, saturation versus wrap, and how rounding error can accumulate.


Spline interpolation

Markus NentwigMarkus Nentwig May 11, 20147 comments

Markus Nentwig provides a cookbook for segmented cubic spline interpolation that turns scattered or noisy data into efficient fixed-point functions. The article shows how to build third-order polynomial segments with explicit value and slope control via basis functions, solve scaling factors by least-squares in Octave/Matlab, and export coefficients for Verilog RTL evaluation using the Horner scheme and practical fixed-point tips.


DSP Related Math: Nice Animated GIFs

Stephane BoucherStephane Boucher April 24, 20143 comments

Stephane Boucher collected a compact set of animated GIFs that make common DSP math click visually. He spotted popular posts on the ECE subreddit and aggregated DSP-focused GIFs in one place to speed intuition and teaching. Examples include the relationship between sin and cos with right triangles, constructing a square wave from an infinite series, and the continuous Fourier transform pair of the rect and sinc functions.


DSPRelated and EmbeddedRelated now on Facebook & I will be at EE Live!

Stephane BoucherStephane Boucher February 27, 20148 comments

Stephane Boucher announces two practical updates for DSPRelated readers. He launched Facebook pages for DSPRelated and EmbeddedRelated so members can get faster updates, and he will be attending EE Live in San Jose from March 30 to April 3 with a $100-off promo code for early registration. He also asks the community for ideas on how to make his conference coverage most useful.


Python number crunching faster? Part I

Christopher FeltonChristopher Felton September 17, 20114 comments

Christopher Felton walks through simple benchmarks comparing raw Python, numpy, and PyPy for numeric workloads, and shares what surprised him about performance. He shows that idiomatic Python optimizations such as list comprehensions and built-ins plus the PyPy JIT can sometimes beat a numpy approach for small tests, and explains why native PyPy numpy progress matters for scientific users.


Simulink-Simulation of SSB demodulation

Josef HoffmannJosef Hoffmann June 13, 20211 comment

This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.


Bayes meets Fourier

Allen DowneyAllen Downey October 26, 2015

Bayes filters and Fourier transforms turn out to have a neat symmetry: prediction uses convolution, while measurement update uses multiplication. In this post, Allen Downey shows how the characteristic function ties Bayes filtering to the Fourier domain, then uses that connection to sketch an FFT-based implementation that can speed up the predict-update cycle. If you like Bayesian estimation and signal processing, this is a satisfying crossover.


Handy Online Simulation Tool Models Aliasing With Lowpass and Bandpass Sampling

Rick LyonsRick Lyons May 4, 20151 comment

Rick Lyons walks through Analog Devices' Frequency Folding Tool, a hands-on simulator that makes aliasing intuitive. The post shows step-by-step demos for lowpass and bandpass sampling and highlights four key behaviors: all analog components fold below Fs/2, bandpass translation, harmonic bandwidth growth, and aliased harmonics interfering with fundamentals. It’s a practical tutorial for engineers learning sampling effects.


There and Back Again: Time of Flight Ranging between Two Wireless Nodes

Qasim ChaudhariQasim Chaudhari October 23, 20175 comments

Conventional timestamping seems too coarse for centimeter-level RF ranging, yet many products claim and deliver that precision. This post unpacks the fundamentals behind high-resolution wireless ranging, contrasting common RF approaches such as RSSI, ToA, PoA, TDoA, and AoA. It also explains how device timestamps and counter registers work, giving engineers a practical starting point for implementing or evaluating time-of-flight ranging systems.


The New Forum is LIVE!

Stephane BoucherStephane Boucher February 18, 20161 comment

The EmbeddedRelated forum just got a major interface refresh, and Stephane Boucher is rolling it out in beta. The new editor makes it easier to drop in images and files, add LaTeX equations with MathJax, and publish highlighted code snippets with highlight.js. Access is gated by approval for now, mainly to keep trolls, spammers, and bots out.


Modelling a Noisy Communication Signal in MATLAB for the Analog to Digital Conversion Process

Parth VakilParth Vakil October 30, 200713 comments

Practical signal modeling treats receiver noise as a fixed power source, not something tied to the transmitted waveform. Parth demonstrates why using MATLAB's awgn(sig,SNR,'measured') can misrepresent an analog front end and provides a short function that scales your signal so the added AWGN produces the desired receiver noise variance. This prepares realistic inputs for upcoming ADC simulations.


Implementing Simultaneous Digital Differentiation, Hilbert Transformation, and Half-Band Filtering

Rick LyonsRick Lyons November 24, 20152 comments

Recently I've been thinking about digital differentiator and Hilbert transformer implementations and I've developed a processing scheme that may be of interest to the readers here on dsprelated.com.


Access to 50+ Sessions From the DSP Online Conference

Stephane BoucherStephane Boucher September 21, 2023

Registering for the 2023 DSP Online Conference gives you 10 months of unlimited access to 50+ on-demand DSP sessions, turning a single sign-up into a compact DSP library. Stephane highlights top-rated talks and workshops you can binge, including deep dives from fred harris and a three-hour control-loop workshop by Dan Boschen. The post points to must-watch recordings on resampling, polyphase filters, FIR design, beamforming, and more.


Make Hardware Great Again

Jeff BrowerJeff Brower June 29, 20205 comments

US weakness in 5G and the coming AI race stems from a deeper problem, hardware decline and lack of CPU innovation. Jeff Brower argues that the software-only narrative has hollowed out semiconductor leadership, leaving only a few chipmakers and blocking vital R&D. He calls for targeted government action, funding for neural-net chips, and an industrial Hardhattan Project to rebuild CPU and hardware capabilities.