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Signed serial-/parallel multiplication

Markus NentwigMarkus Nentwig February 16, 2014

Struggling with costly wide adders for signed multiplication on FPGAs? Markus Nentwig unpacks a neat bit-level trick that turns two's-complement signed-signed multiplication into a serial-parallel routine using only a one-bit wider adder. Learn how flipping sign bits and a small, controlled constant cancel lets you avoid full sign-extension, and get a parametrized Verilog RTL plus synthesis notes to try it yourself.


A Remarkable Bit of DFT Trivia

Rick LyonsRick Lyons December 26, 20133 comments

Rick Lyons highlights a surprising equality: the DFT's worst-case scalloping loss equals 2/π, the same probability that a toothpick crosses a floorboard seam in Buffon's needle problem when the toothpick equals board width. The post sketches the DFT bin-intersection derivation and connects the math to the classic probability puzzle, offering a playful insight that sharpens intuition about bin responses.


Understanding and Preventing Overflow (I Had Too Much to Add Last Night)

Jason SachsJason Sachs December 4, 2013

Integer overflow is stealthier than you think, and in embedded systems it can break control loops or corrupt data. Jason Sachs walks through the usual culprits, including addition, subtraction, multiplication, shifting and Q15 fixed-point traps, plus C-specific pitfalls such as undefined signed overflow and INT_MIN edge cases. He then lays out practical defenses: prefer fixed-width types, widen and saturate intermediates, enable wraparound where appropriate, and reason about modular congruence for compound arithmetic.


Finding the Best Optimum

Tim WescottTim Wescott November 4, 2013

Optimization is seductive but often misleading, especially when mathematical models don't match messy reality. Tim Wescott shares stories from circuits and communications to show how chasing the theoretical global optimum can waste time and money. He recommends framing 'best' in practical terms, validating models, and optimizing for cost and impact so products ship on time and actually work in the real world.


Computing Translated Frequencies in Digitizing and Downsampling Analog Bandpass Signals

Rick LyonsRick Lyons October 31, 20131 comment

Textbooks rarely give ready formulas for tracking where individual spectral lines land after bandpass sampling or decimation. Rick Lyons provides three concise equations, with Matlab code, that compute translated frequencies for analog bandpass sampling, real digital downsampling, and complex downsampling. Practical examples show how to place the sampled image at fs/4 and how to translate a complex bandpass to baseband for efficient demodulation.


Goertzel Algorithm for a Non-integer Frequency Index

Rick LyonsRick Lyons October 7, 201325 comments

Rick Lyons demonstrates how to run the Goertzel algorithm with a non-integer frequency index k, letting you target DTFT frequencies that do not align with DFT bin centers. He interprets Rajmic and Sysel's generalization, provides a simple implementation, and presents a real-valued reformulation that reduces the final multiplies for real inputs. Example Matlab code is included to reproduce and adapt the technique.


Is It True That j is Equal to the Square Root of -1 ?

Rick LyonsRick Lyons September 16, 20136 comments

A viral YouTube video claimed that saying j equals the square root of negative one is wrong. Rick Lyons shows the apparent paradox comes from misusing square-root identities with negative arguments, not from the usual definition of j. He argues it is safer to define j by j^2 = -1 and illustrates how careless root operations produce contradictions in two appendices.


Signal Processing Contest in Python (PREVIEW): The Worst Encoder in the World

Jason SachsJason Sachs September 7, 20136 comments

Jason Sachs previews a hands-on Python contest to find the best velocity estimator for a noisy, low-cost quadrature encoder. The post explains the Estimator API, submission constraints, and a 5 second, 10 kHz evaluation harness that uses a simulated "Lucky Wheel" encoder with realistic manufacturing timing errors. Jason also includes a simple baseline estimator and discusses the practical tradeoff between noise reduction and phase lag in velocity estimation.


A Table of Digital Frequency Notation

Rick LyonsRick Lyons August 5, 2013

Rick Lyons compiles a compact, practical table that untangles the many algebraic frequency notations used in DSP. The reference lines up continuous and discrete sinusoid forms, shows the frequency variable names and units, and lists valid ranges and conversions like Ω = 2πf and normalized forms with fs. A printable PDF of the table is available for easy desk reference.


Shared-multiplier polyphase FIR filter

Markus NentwigMarkus Nentwig July 31, 20137 comments

One multiplier and a dual-port RAM can implement an arbitrary m/n polyphase FIR resampler on an FPGA, Markus Nentwig demonstrates. The post focuses on practical implementation details, including a parametrized Verilog design, pipelined MAC control, and a Matlab testbench for verification. It shows how bank indexing and pipeline delay compensation let you multiplex many coefficient banks efficiently for resource-constrained FPGA designs.


scipy.signal calling all developers

Christopher FeltonChristopher Felton January 19, 20122 comments

SciPy’s signal-processing toolbox is at a crossroads, and Christopher Felton is urging developers to jump in. He points to active discussion on scipy-dev, the possibility of a separate scikit-signal effort, and the broad set of functions already in scipy.signal. If you work in DSP and like open-source software, this is a good moment to look at the package, and maybe help shape it.


Multilayer Perceptrons and Event Classification with data from CODEC using Scilab and Weka

David NorwoodDavid Norwood November 25, 2015

For my first blog, I thought I would introduce the reader to Scilab [1] and Weka [2]. In order to illustrate how they work, I will put together a script in Scilab that will sample using the microphone and CODEC on your PC and save the waveform as a CSV file.


The Beginning of a New Chapter

Stephane BoucherStephane Boucher October 22, 20255 comments

After years of hesitation, Stephane Boucher and Jacob Beningo finally turned their virtual events into an in-person reality with the inaugural Signal Processing Summit and Embedded Systems Summit at the Sonesta Silicon Valley. The post captures the logistics, a last-minute travel scare during a US government shutdown, the joy of meeting speakers like Fred Harris, and practical lessons for future technical events. It closes by inviting community feedback and venue suggestions.


A Useful Source of Signal Processing Information

Rick LyonsRick Lyons March 23, 20168 comments

A surprisingly handy web tool turned up for finding signal processing material in PDF and PowerPoint form. Rick Lyons shows how a plain-looking site can surface lots of topic-specific documents, using FM demodulation as the example. If you often hunt for reference slides and papers, this is a quick source worth bookmarking.


Make Hardware Great Again

Jeff BrowerJeff Brower June 29, 20205 comments

US weakness in 5G and the coming AI race stems from a deeper problem, hardware decline and lack of CPU innovation. Jeff Brower argues that the software-only narrative has hollowed out semiconductor leadership, leaving only a few chipmakers and blocking vital R&D. He calls for targeted government action, funding for neural-net chips, and an industrial Hardhattan Project to rebuild CPU and hardware capabilities.


The Zeroing Sine Family of Window Functions

Cedron DawgCedron Dawg August 16, 20202 comments

A previously unrecognized family of DFT window functions is introduced, built from products of shifted sines that deliberately zero out tail samples and control nonzero support. Cedron Dawg presents recursive and semi-root constructions, runnable code, and numerical examples, and shows that the odd-N member L=(N-1)/2 numerically matches a discrete Hermite-Gaussian DFT eigenvector. The post highlights practical properties, an even-N fix, and applications to spectrograms and tone decomposition.


"Neat" Rectangular to Polar Conversion Algorithm

Rick LyonsRick Lyons November 15, 20105 comments

Rick Lyons revisits a clever slide-rule era trick for estimating the magnitude of a complex number without computing a square root. He highlights a neat identity, prompted by a Jerry Avins post, that converts the sqrt problem into forward and inverse trigonometric operations plus ratios. The post invites readers to derive Eq. (2) and see why a seemingly complex idea is actually simple and practical.


Autocorrelation and the case of the missing fundamental

Allen DowneyAllen Downey January 21, 201610 comments

A short hands-on exploration shows why we perceive the fundamental pitch even when it's absent from the spectrum. Using saxophone recordings, high-pass filtering, and autocorrelation plots, the post demonstrates that the highest ACF peak often predicts perceived pitch rather than the strongest spectral line. The experiments also show that removing high harmonics eliminates the effect, and that autocorrelation is a useful but incomplete model of pitch perception.


A Remarkable Bit of DFT Trivia

Rick LyonsRick Lyons December 26, 20133 comments

Rick Lyons highlights a surprising equality: the DFT's worst-case scalloping loss equals 2/π, the same probability that a toothpick crosses a floorboard seam in Buffon's needle problem when the toothpick equals board width. The post sketches the DFT bin-intersection derivation and connects the math to the classic probability puzzle, offering a playful insight that sharpens intuition about bin responses.


A Wide-Notch Comb Filter

Rick LyonsRick Lyons November 24, 201918 comments

Traditional comb filters make very narrow stopband notches, which limits their ability to suppress broader interfering tones. Rick Lyons presents a linear-phase comb filter that produces wider stopband notches than the conventional design while preserving linear-phase behavior. The post also reviews the traditional cascaded recursive running-sum architecture, its co-located dual poles and zeros on the z-plane, and the placement of nulls at integer multiples of fs/D.