Bayes meets Fourier
Bayes filters and Fourier transforms turn out to have a neat symmetry: prediction uses convolution, while measurement update uses multiplication. In this post, Allen Downey shows how the characteristic function ties Bayes filtering to the Fourier domain, then uses that connection to sketch an FFT-based implementation that can speed up the predict-update cycle. If you like Bayesian estimation and signal processing, this is a satisfying crossover.
Number Theory for Codes
If CRCs have felt like black magic, this post peels back the curtain with basic number theory and polynomial arithmetic over GF(2). It shows how fixed-width processor arithmetic becomes arithmetic in a finite field, how bit sequences are treated as polynomials, and why primitive polynomials generate every nonzero element. You also get practical insights on CRC implementation with byte tables and LFSRs.
Recruiting New Bloggers!
EmbeddedRelated is expanding its blogging team, and Stephane Boucher is inviting engineers, students, hobbyists, and researchers to contribute. He points to the success of earlier contributors and says the community has already read their articles more than 1,250,000 times. If you have knowledge to share, this post explains how to pitch a topic and get started.
A New Contender in the Digital Differentiator Race
Rick Lyons presents a compact FIR differentiator that widens the usable linear-frequency range while remaining simple to implement. The five-tap impulse response boosts the linear operating band by roughly 33% over his earlier design, offers exact two-sample group delay and linear phase, and can be realized in a folded multiplier-free form using binary right shifts. The design targets signals below pi/2 radians per sample.
The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase
Rick Lyons pulls back the curtain on a little-known coefficient constraint that makes complex-coefficient FIR filters exhibit linear phase. Rather than simple symmetry of real coefficients, the key is a conjugate-reflection relation involving the filter phase at DC, which collapses to ordinary symmetry for real taps. The post includes derivations, intuition using the inverse DTFT, and a Matlab example to verify the result.
Four Ways to Compute an Inverse FFT Using the Forward FFT Algorithm
Rick Lyons lays out four practical techniques to get an inverse FFT when you only have forward FFT software or FPGA cores available. The post highlights a classic data-reversal trick, a conjugate-symmetry optimized flow, and two methods that avoid reversals using data swapping or complex conjugation plus scaling. Each method notes when it is preferable so engineers can pick the least costly implementation.
Correcting an Important Goertzel Filter Misconception
A common claim says the Goertzel algorithm is marginally stable and prone to numerical errors. Rick Lyons shows that the usual second-order Goertzel filter has conjugate poles exactly on the unit circle, so pole placement alone does not make it unstable. The practical limits are coefficient quantization, which reduces frequency precision, and accumulator overflow for very large N.
Fitting a Damped Sine Wave
Detlef Amberg presents a simple linear-algebra approach to recover frequency, phase, amplitude, and damping of a sampled damped sine wave. Instead of nonlinear fitting, the method casts the waveform as a second-order difference equation, uses linear regression to estimate b and omega, and recovers amplitude and phase by mixing with quadrature carriers; amplitude and damping are then fine-tuned with a gradient iteration. MATLAB code is available on File Exchange.
Premium Forum?
Stephane Boucher proposes a paid "premium" forum for DSPRelated that would redistribute membership fees to the community s top contributors via voting. The plan frames the $20/year fee as an incentive mechanism, not a revenue stream, with monthly payouts to the most appreciated posters. Boucher invites reader feedback to decide whether to implement the idea or pursue alternatives.
Phase and Amplitude Calculation for a Pure Real Tone in a DFT: Method 1
Cedron Dawg shows how to get exact amplitude and phase for a real sinusoid whose frequency does not land on an integer DFT bin. The method treats a small neighborhood of DFT bins as a complex vector, builds two basis vectors from the cosine and sine transforms, and solves a 2x2 system using conjugate dot products to recover real coefficients that give amplitude and phase. A C++ example and sample output verify the formulas.
Embedded World 2018 - More Videos!
Two cinematic videos from Embedded World 2018 turn the show floor into slow-motion, stabilized footage using a Zhiyun Crane gimbal and a Sony a6300. One is a SEGGER booth highlights piece featuring Rolf Segger and Axel Wolf, the other is a roaming montage with appearances from Jacob Beningo, Micheal Barr, and Alan Hawse. Stephane asks viewers to enable audio and share feedback.
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
Stephane Boucher is heading to Sensors Expo in San Jose for the first time, and he is bringing cameras to capture demos and build a highlights video. He is also looking for roommates for a roomy Airbnb near the convention center, plus local tips for making the most of a free day in the Bay Area. If you are attending, there is also a registration discount code and a VIP pass giveaway in the mix.
The Nature of Circles
Averaging angles the usual way can produce nonsense: the mean of 0 and 359 degrees is not 179.5 when working with circular data. Peter Kootsookos shows the correct approach using vectorial or phasor averaging, converting angles to unit complex numbers and taking the argument of their sum. The short post points to directional statistics and a related IEEE paper for deeper details.
Design of an anti-aliasing filter for a DAC
If you need a practical way to design an anti-aliasing filter for a DAC, this post delivers an Octave/Matlab script that numerically optimizes a Laplace-domain transfer function for linear phase and arbitrary magnitude. The routine models the DAC sample-and-hold sinc response, compensates group delay automatically, and can include an optional multiplierless FIR equalizer. An example shows a 5.4 dB objective improvement and reduced analog Q for easier implementation.
Oscilloscope Dreams
Jason Sachs walks through practical oscilloscope buying criteria for embedded engineers, focusing on bandwidth, channel count, hi-res acquisition, and probing. He explains why mixed-signal scopes and hi-res mode matter, when a 100 MHz scope is sufficient and when to keep a higher-bandwidth instrument, and how probe grounding and waveform export can ruin measurements. Real-world brand notes and try-before-you-buy advice round out the guidance.
The Signal Processing Summit 2025 - Registrations Now Open!
Stephane Boucher announces that registration is open for the inaugural Signal Processing Summit, October 14-16, 2025 at the Sonesta Silicon Valley. This three-day, engineer-focused event promises practical insights from leading DSP experts and tight networking in an intimate 70-seat setting. Register early to save $200 with the Early Bird rate and lock in a discounted Sonesta room before the block fills.
Ancient History
Technology moves fast, and the tools, platforms, and assumptions you rely on can become outdated almost overnight. In this reflective post, the author contrasts the rapid evolution of embedded development with the much slower pace of social change, from programming turnaround times to the underrepresentation of women in engineering. It is a reminder to keep learning, but also to think about how we work and who gets included.
GPGPU DSP
Shehrzad Qureshi kicks off his DSP blog by championing GPGPU, focusing on Nvidia's CUDA and real-product experience. He argues that with CPU clock speeds stalled, large-scale parallelism on GPUs is the practical path forward for many signal-processing tasks. The post traces GPGPU history from shader 'hacks' to modern APIs and previews future posts comparing CUDA vs OpenCL, Intel's Larrabee, and Nvidia Fermi.
Compute Images/Aliases of CIC Interpolators/Decimators
CIC filters provide multiplier-free interpolation and decimation for large sample-rate changes, but their images and aliases can trip up designs. This post supplies two concise Matlab functions and hands-on examples to compute interpolator images and decimator aliases, showing spectra and freqz plots. Readers will learn how interpolation ratio and number of stages alter passband, stopband, and aliasing behavior.
Generating pink noise
This post implements a stochastic Voss-McCartney pink-noise generator in Python, tackling why incremental per-sample algorithms do not map well to NumPy batch operations. It presents a practical NumPy/Pandas approach that uses geometric-distributed update events and pandas' fillna for column-wise zero-order hold to make batch generation efficient. The generated noise shows a power-spectrum slope near -1, matching expected 1/f behavior.
Find Aliased ADC or DAC Harmonics (with animation)
If a sinewave drives an ADC or DAC, device nonlinearities create harmonics that can fold back as aliases above Nyquist. This post shows a simple Matlab model, using an NCO, a static nonlinearity, and a DFT to generate spectra and reveal aliased harmonics, with animated illustrations to make aliasing intuitive. The approach works for both ADC and DAC measurement setups and highlights realistic effects like quantization noise.
Reducing IIR Filter Computational Workload
Rick Lyons demonstrates a simple, practical way to cut the multiply count for IIR lowpass and highpass filters by converting them into dual-path allpass structures. The conversion preserves the original magnitude response while drastically reducing multiplies per input sample, for example turning a 5th-order IIR that needs 11 multiplies into an equivalent allpass form needing only five. The linked PDF includes theory, implementation notes, a design example, and MATLAB code.
Impulse Response Approximation
A stepped-triangular impulse approximation represents an FIR low-pass using a cascade of recursive running-sum filters, offering big savings in computation. Christopher Felton outlines the quantization step that maps a true impulse into three stepped-triangular types and shows how the approximation is built from recursive running-sum and sparse-sum blocks. Inspect the frequency tradeoffs and decide if the efficiency gain is worth the approximation error.
Deconvolution by least squares (Using the power of linear algebra in signal processing).
When we deal with our normal discrete signal processing operations, like FIR/IIR filtering, convolution, filter design, etc. we normally think of the signals as a constant stream of numbers that we put in a sequence
Orfanidis Textbooks are Available Online
Two classic signal processing textbooks by Sophocles J. Orfanidis are now available for download from his Rutgers webpages. The first, Introduction to Signal Processing, includes errata and a homework solutions manual. The second, Optimum Signal Processing, includes a solutions manual plus MATLAB, C and Fortran code. Note that Prof. Orfanidis retains copyright on both books, All Rights Reserved.
Bank-switched Farrow resampler
Markus Nentwig proposes a bank-switched variant of the Farrow resampler that breaks each impulse-response segment into multiple sub-segments, enabling accurate interpolation with lower-order polynomials and fewer multiplications per output. This trades increased total coefficient storage for computational savings. The post explains the concept, connects it to polyphase FIR interpolation, and provides Matlab/Octave and C example code for practical evaluation.
Interpolator Design: Get the Stopbands Right
In this article, I present a simple approach for designing interpolators that takes the guesswork out of determining the stopbands.
Decimators Using Cascaded Multiplierless Half-band Filters
In my last post, I provided coefficients for several multiplierless half-band FIR filters. In the comment section, Rick Lyons mentioned that such filters would be useful in a multi-stage decimator. For such an application, any subsequent multipliers save on resources, since they operate at a fraction of the maximum sample frequency. We’ll examine the frequency response and aliasing of a multiplierless decimate-by-8 cascade in this article, and we’ll also discuss an interpolator cascade using the same half-band filters.
Feedback Controllers - Making Hardware with Firmware. Part 8. Control Loop Test-bed
Built around modest FPGA hardware, this post presents a practical test-bed for evaluating high-speed, low-latency feedback controllers. It covers ADC/DAC specifications, basic and arbitrary test signals, and an IFFT-based generator that can produce thousands of simultaneous tones for rapid Bode, phase, and latency measurements. The article also compares two IFFT strategies, explains turbo sampling, and shows open- and closed-loop test configurations.
Collaborative Writing Experiment: Your Favorite DSP Websites
Stephane Boucher invites the DSPRelated community to a live Google Docs experiment to crowdsource the best DSP websites. After a successful run with EmbeddedRelated, he opens a shared document where members can add, edit, and curate links in real time. The post explains the simple rules, notes revision rollback protection, and asks readers to refresh and help keep the list useful and spam-free while watching it evolve.
