The Number 9, Not So Magic After All
Rick Lyons dismantles the mystique around the number 9 by showing its 'magic' stems from our base-10 system rather than any unique numeral power. He walks through classic 9 tricks, including digit-sum divisibility, digital-root behavior, and division patterns, then generalizes them to base-B where digit B-1 plays the same role. The post is a short, playful link between recreational arithmetic and radix thinking.
Sum of Two Equal-Frequency Sinusoids
Rick Lyons exposes a frequent trig mistake and delivers complete closed-form expressions for collapsing two equal-frequency sinusoids into a single sinusoid. Using complex-exponential phasor addition and equating real and imaginary parts, he compiles easy-to-use tables for cosine+cosine, sine+sine, and cosine+sine cases and shows how to derive each form. Engineers get corrected identities and compact derivations useful for analysis and communications.
The DFT Magnitude of a Real-valued Cosine Sequence
Rick Lyons proves a simple but often-missing result: the N-point DFT peak magnitude of a real cosine with an integer number of cycles equals A·N/2. He uses Euler's formula and geometric-series summation, shows a neat shortcut that avoids l'Hôpital's rule, and connects the math to practical fixed-point FFT sizing and overflow prevention on two's-complement hardware. The post also notes conjugate symmetry and the same result for sine inputs.
Specifying the Maximum Amplifier Noise When Driving an ADC
You can quantify how much amplifier noise is acceptable before adding gain actually hurts an ADC's output SNR. Rick Lyons presents a compact rule showing the amplifier input-referred noise power must be less than (1 - 1/α^2) times the ADC's q^2/12 quantization noise power, with Eq. (8) and a pair of figures that make it easy to pick or specify the right amplifier for a given gain α.
Constrained Integer Behavior
Overflow and underflow are not always bugs, they can be useful in DSP when fixed-width integers wrap during processing. Christopher Felton demonstrates with moving-average (recursive-windowed-averager) and CIC filter examples how 2's complement wraparound in MyHDL's modbv cancels between an integrator and a comb via pole-zero cancellation. He also covers fixed-point resizing choices, saturation versus wrap, and how rounding error can accumulate.
Spline interpolation
Markus Nentwig provides a cookbook for segmented cubic spline interpolation that turns scattered or noisy data into efficient fixed-point functions. The article shows how to build third-order polynomial segments with explicit value and slope control via basis functions, solve scaling factors by least-squares in Octave/Matlab, and export coefficients for Verilog RTL evaluation using the Horner scheme and practical fixed-point tips.
DSP Related Math: Nice Animated GIFs
Stephane Boucher collected a compact set of animated GIFs that make common DSP math click visually. He spotted popular posts on the ECE subreddit and aggregated DSP-focused GIFs in one place to speed intuition and teaching. Examples include the relationship between sin and cos with right triangles, constructing a square wave from an infinite series, and the continuous Fourier transform pair of the rect and sinc functions.
DSPRelated and EmbeddedRelated now on Facebook & I will be at EE Live!
Stephane Boucher announces two practical updates for DSPRelated readers. He launched Facebook pages for DSPRelated and EmbeddedRelated so members can get faster updates, and he will be attending EE Live in San Jose from March 30 to April 3 with a $100-off promo code for early registration. He also asks the community for ideas on how to make his conference coverage most useful.
Signed serial-/parallel multiplication
Struggling with costly wide adders for signed multiplication on FPGAs? Markus Nentwig unpacks a neat bit-level trick that turns two's-complement signed-signed multiplication into a serial-parallel routine using only a one-bit wider adder. Learn how flipping sign bits and a small, controlled constant cancel lets you avoid full sign-extension, and get a parametrized Verilog RTL plus synthesis notes to try it yourself.
A Remarkable Bit of DFT Trivia
Rick Lyons highlights a surprising equality: the DFT's worst-case scalloping loss equals 2/π, the same probability that a toothpick crosses a floorboard seam in Buffon's needle problem when the toothpick equals board width. The post sketches the DFT bin-intersection derivation and connects the math to the classic probability puzzle, offering a playful insight that sharpens intuition about bin responses.
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2
Mike Dunn walks through practical, low-level debugging to fix "Can't initialize target CPU" on TI C6000 DSPs using CCS 3.3, focusing on XDS510-class emulators. He demonstrates how to run xdsprobe to perform JTAG resets, read and interpret adapter and port error messages, and run JTAG IR/DR integrity tests. The article shows example outputs and a simple scope-based trace to locate signal faults.
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
This article demonstrates combining DSP and feedback-control on an Intel Cyclone floating-point FPGA to build low-latency closed-loop circuit emulators and controllers. Using a single floating-point biquad at 1.6 Msps, an IFFT multi-tone 4.096 ms capture for wideband measurement, and MATLAB references for verification, the author achieves sub-nanosecond timing insight and applies DSP phase compensation to cancel about 100 pF of PCB parasitics.
The Risk In Using Frequency Domain Curves To Evaluate Digital Integrator Performance
Frequency-response curves can be misleading when selecting a digital integrator, Rick Lyons shows, and he proves it with counterexamples using seven test signals. By comparing methods such as Simpson's 1/3 rule, Al-Alaoui, and Tick's rule on definite-integral tasks, Lyons demonstrates that a close match to the ideal frequency response does not guarantee accurate integrals, because input signal traits strongly affect results.
DFT Bin Value Formulas for Pure Real Tones
Cedron Dawg derives a closed-form expression for the DFT bin values produced by a pure real sinusoid, then uses that formula to explain well known DFT behaviors. The post walks through the algebra from Euler identities to a compact computational form, highlights the integer versus non-integer frequency cases, and verifies the result with C code and printed numeric output.
Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
This article digs into practical sampled-data issues you must address when building feedback controllers for circuit emulation. It highlights a common MATLAB versus Simulink discrepancy caused by DAC holding, explains why FOH (ramp-invariant) c2d conversion matters, and surveys latency, bit depth, filter and precision trade-offs. It also lists candidate ADCs, DACs and FPGAs used in a real evaluation platform to guide hardware choices.
The Freshers Interview Guide
Hiring managers see the same avoidable mistakes from new grads, so Jeff offers blunt, practical advice to fix them. This short guide explains why honesty, solid debugging skills, and clear resumes matter more than cramming technical facts, and shows how to demonstrate problem-solving, organization, and teamwork in an interview to stand out as a reliable entry-level DSP or EE candidate.
Discrete Wavelet Transform Filter Bank Implementation (part 1)
David Valencia walks through a practical implementation of discrete wavelet transform filter banks, focusing on cascading branches and efficient equivalent filters. He contrasts DWT and DFT resolution behavior and shows how cascading the low-pass branch sharpens frequency division while the high-pass path remains unchanged. Code pointers and a preview of formfilters() demonstrate how to compute only the needed samples by combining filters with upsampling.
Weighted least-squares FIR with shared coefficients
Markus Nentwig demonstrates how to design FIR filters that share coefficients across delay taps, allowing multiplier reuse and reduced implementation cost. He reimplements Lawson's iterative reweighted least-squares for complex-valued FIRs and provides Matlab/Octave code you can adapt for nonstandard constraints. The post explains iteration weight logic, the Toeplitz special-case with Levinson-Durbin, and practical trade-offs between multiplier count and stopband performance.
Coupled-Form 2nd-Order IIR Resonators: A Contradiction Resolved
Rick Lyons resolves a long-standing confusion about the coupled-form 2nd-order IIR resonator by deriving its correct z-domain transfer function and explaining why textbooks can appear to contradict pole plots. He shows that with infinite precision the coupled and standard denominators match, but finite-bit quantization of rcos(Θ) and rsin(Θ) changes the z^-2 coefficient and shifts pole positions. Read to learn the correct H(z) to predict quantized behavior and when the coupled form outperforms the standard design.
Phase and Amplitude Calculation for a Pure Complex Tone in a DFT
Cedron Dawg derives compact, exact formulas to recover the phase and amplitude of a single complex tone from a DFT bin when the tone frequency is known. The paper turns the complex bin value into closed-form expressions using a sine-fraction amplitude correction and a simple phase shift, and includes working code plus a numeric example for direct implementation.
Bayes meets Fourier
Joseph Fourier never met Thomas Bayes—Fourier was born in 1768, seven years after Bayes died. But recently I have been exploring connections between the Bayes filter and the Fourier transform.
By "Bayes filter", I don't mean spam filtering using a Bayesian classifier, but rather recursive Bayesian estimation, which is used in robotics and other domains to estimate the state of a system that evolves over time, for example, the position of a moving robot. My interest in...
A brief look at multipath radio channels
Markus Nentwig walks through a hands-on RF experiment that makes multipath and fading visible using a network analyzer and simple dipole antennas. He shows how reflections produce frequency-domain notches when path differences equal half wavelengths, and how doubling distance increases free-space path loss by roughly 6 dB. The post explains why narrowband signals often see flat fading while wideband links become frequency-selective, motivating OFDM and multi-tap channel models.
There and Back Again: Time of Flight Ranging between Two Wireless Nodes
Conventional timestamping seems too coarse for centimeter-level RF ranging, yet many products claim and deliver that precision. This post unpacks the fundamentals behind high-resolution wireless ranging, contrasting common RF approaches such as RSSI, ToA, PoA, TDoA, and AoA. It also explains how device timestamps and counter registers work, giving engineers a practical starting point for implementing or evaluating time-of-flight ranging systems.
Learn About Transmission Lines Using a Discrete-Time Model
A simple discrete-time approach makes lossless transmission-line behavior easy to simulate and visualize. The post introduces MATLAB functions tline and wave_movie to model uniform lossless lines with resistive terminations, compute time and frequency responses, and animate travelling waves. A microstrip pulse example shows how reflections produce ringing and how source matching nearly eliminates it, making this a practical learning tool.
Instant CIC
Modeling CIC decimators in floating point is simpler than you might think, Markus Nentwig shows, if you treat the filter as a finite FIR by sampling its impulse response. The post compares a naive float time-domain implementation, an FFT-based frequency-domain approach, and the recommended method of computing the impulse response and using an off-the-shelf FIR filter, with code and plots.
Access to 50+ Sessions From the DSP Online Conference
Registering for the 2023 DSP Online Conference gives you 10 months of unlimited access to 50+ on-demand DSP sessions, turning a single sign-up into a compact DSP library. Stephane highlights top-rated talks and workshops you can binge, including deep dives from fred harris and a three-hour control-loop workshop by Dan Boschen. The post points to must-watch recordings on resampling, polyphase filters, FIR design, beamforming, and more.
A Direct Digital Synthesizer with Arbitrary Modulus
Need exact sampled tones on a coarse grid without a huge sine table? This post shows how to build a Direct Digital Synthesizer with an arbitrary modulus so the output frequency is exactly k·fs/L, using a look-up table as small as 20 entries for the 10 MHz/0.5 MHz-step example. It also explains fixed-point LUT rounding, accumulator bit sizing, and how to produce quadrature outputs when L is multiple of 4.
The Zeroing Sine Family of Window Functions
A previously unrecognized family of DFT window functions is introduced, built from products of shifted sines that deliberately zero out tail samples and control nonzero support. Cedron Dawg presents recursive and semi-root constructions, runnable code, and numerical examples, and shows that the odd-N member L=(N-1)/2 numerically matches a discrete Hermite-Gaussian DFT eigenvector. The post highlights practical properties, an even-N fix, and applications to spectrograms and tone decomposition.
Coefficients of Cascaded Discrete-Time Systems
Multiplying discrete-time transfer functions is just polynomial multiplication, and polynomial multiplication is convolution. Neil Robertson shows that the numerator and denominator coefficients of cascaded systems come from convolving the individual coefficient vectors, then demonstrates the idea with MATLAB code and a 2nd-order IIR cascade that yields a 4th-order response. The approach makes computing time and frequency responses straightforward.
"Neat" Rectangular to Polar Conversion Algorithm
Rick Lyons revisits a clever slide-rule era trick for estimating the magnitude of a complex number without computing a square root. He highlights a neat identity, prompted by a Jerry Avins post, that converts the sqrt problem into forward and inverse trigonometric operations plus ratios. The post invites readers to derive Eq. (2) and see why a seemingly complex idea is actually simple and practical.
