A poor man's Simulink
Markus Nentwig built a compact glue layer that embeds NGSPICE into Octave to cosimulate continuous-time circuits and digital control. The article walks through an RC lowpass example, the MEX-based Octave interface, and the breakpoint-driven cosimulation flow, showing how adaptive SPICE integration handles asynchronous and time-triggered events. It presents a practical, low-cost alternative to Simulink for tightly coupled analog-digital system design.
A Complex Variable Detective Story – A Disconnect Between Theory and Implementation
A subtle phase-wrap gotcha turned a clean pencil-and-paper derivation into a software mismatch for a 5-tap FIR filter with complex coefficients. Rick Lyons shows why two algebraically equivalent-looking expressions can disagree in code, and traces the real culprit to angle limits in rectangular-form complex arithmetic. The fix is simple once you see it, but the trap is easy to miss.
The Number 9, Not So Magic After All
Rick Lyons dismantles the mystique around the number 9 by showing its 'magic' stems from our base-10 system rather than any unique numeral power. He walks through classic 9 tricks, including digit-sum divisibility, digital-root behavior, and division patterns, then generalizes them to base-B where digit B-1 plays the same role. The post is a short, playful link between recreational arithmetic and radix thinking.
Sum of Two Equal-Frequency Sinusoids
Rick Lyons exposes a frequent trig mistake and delivers complete closed-form expressions for collapsing two equal-frequency sinusoids into a single sinusoid. Using complex-exponential phasor addition and equating real and imaginary parts, he compiles easy-to-use tables for cosine+cosine, sine+sine, and cosine+sine cases and shows how to derive each form. Engineers get corrected identities and compact derivations useful for analysis and communications.
The DFT Magnitude of a Real-valued Cosine Sequence
Rick Lyons proves a simple but often-missing result: the N-point DFT peak magnitude of a real cosine with an integer number of cycles equals A·N/2. He uses Euler's formula and geometric-series summation, shows a neat shortcut that avoids l'Hôpital's rule, and connects the math to practical fixed-point FFT sizing and overflow prevention on two's-complement hardware. The post also notes conjugate symmetry and the same result for sine inputs.
Specifying the Maximum Amplifier Noise When Driving an ADC
You can quantify how much amplifier noise is acceptable before adding gain actually hurts an ADC's output SNR. Rick Lyons presents a compact rule showing the amplifier input-referred noise power must be less than (1 - 1/α^2) times the ADC's q^2/12 quantization noise power, with Eq. (8) and a pair of figures that make it easy to pick or specify the right amplifier for a given gain α.
Constrained Integer Behavior
Overflow and underflow are not always bugs, they can be useful in DSP when fixed-width integers wrap during processing. Christopher Felton demonstrates with moving-average (recursive-windowed-averager) and CIC filter examples how 2's complement wraparound in MyHDL's modbv cancels between an integrator and a comb via pole-zero cancellation. He also covers fixed-point resizing choices, saturation versus wrap, and how rounding error can accumulate.
Spline interpolation
Markus Nentwig provides a cookbook for segmented cubic spline interpolation that turns scattered or noisy data into efficient fixed-point functions. The article shows how to build third-order polynomial segments with explicit value and slope control via basis functions, solve scaling factors by least-squares in Octave/Matlab, and export coefficients for Verilog RTL evaluation using the Horner scheme and practical fixed-point tips.
DSP Related Math: Nice Animated GIFs
Stephane Boucher collected a compact set of animated GIFs that make common DSP math click visually. He spotted popular posts on the ECE subreddit and aggregated DSP-focused GIFs in one place to speed intuition and teaching. Examples include the relationship between sin and cos with right triangles, constructing a square wave from an infinite series, and the continuous Fourier transform pair of the rect and sinc functions.
DSPRelated and EmbeddedRelated now on Facebook & I will be at EE Live!
Stephane Boucher announces two practical updates for DSPRelated readers. He launched Facebook pages for DSPRelated and EmbeddedRelated so members can get faster updates, and he will be attending EE Live in San Jose from March 30 to April 3 with a $100-off promo code for early registration. He also asks the community for ideas on how to make his conference coverage most useful.
The Risk In Using Frequency Domain Curves To Evaluate Digital Integrator Performance
Frequency-response curves can be misleading when selecting a digital integrator, Rick Lyons shows, and he proves it with counterexamples using seven test signals. By comparing methods such as Simpson's 1/3 rule, Al-Alaoui, and Tick's rule on definite-integral tasks, Lyons demonstrates that a close match to the ideal frequency response does not guarantee accurate integrals, because input signal traits strongly affect results.
Frequency Translation by Way of Lowpass FIR Filtering
Rick Lyons shows how you can translate a signal down in frequency and lowpass filter it in a single operation by embedding cosine mixing values into FIR coefficients. The post explains how to build the translating FIR, how to choose the number of coefficient sets, and how decimation can dramatically reduce storage needs while noting practical constraints like the requirement that ft be an integer submultiple of fs.
Using the DFT as a Filter: Correcting a Misconception
Some sources claim the DFT, when used as a filter, shifts spectral energy down to DC. Rick Lyons shows that this is not true for consecutive DFT-bin outputs and explains the cause of the confusion: the FIR interpretation requires reversing the usual twiddle-factor order. He derives the DFT-bin frequency response, shows the bandpass center at 2πm/N, and explains when decimation does produce a translation to zero Hz.
The Sampling Theorem - An Intuitive Approach
Scott Kurtz from DSPSoundWare.com has put together a video presentation that aims to give DSP engineers an intuitive grasp of the Sampling Theorem. The short, approachable video focuses on conceptual understanding of sampling and aliasing rather than mathematical formality. Watch the presentation on DSPRelated and share your reactions in the post comments to join the discussion.
Phase and Amplitude Calculation for a Pure Complex Tone in a DFT using Multiple Bins
Cedron presents exact, closed-form formulas to extract the phase and amplitude of a pure complex tone from multiple DFT bin values, using a compact vector formulation. The derivation introduces a delta variable to simplify the sinusoidal bin expression, stacks neighboring bins into a basis vector, and solves for the complex amplitude q by projection. The phase and magnitude follow directly from q, and extra bins reduce leakage when the tone falls between bins.
Matlab Code to Synthesize Multiplierless FIR Filters
Learn how to build multiplierless FIR lowpass filters in Matlab using Canonic Signed-Digit coefficients. The post explains converting Parks-McClellan floating-point taps to scaled integers, then to exact CSD digits, and includes two m-files that search maintap scaling to minimize signed digits while preserving the filter response. Practical notes cover external gain compensation, the 2/3 full-scale CSD limit, and sensitivity to pass/stop edges.
Hello and Introduction
Parth Vakil introduces a personal DSP journal built to capture techniques he has worked through and to share them with the community. He plans to focus on how methods behave in practice, with just enough math to point readers toward the right references. Digital receivers will be one of the first topics, along with occasional MATLAB functions and FPGA code.
Signed serial-/parallel multiplication
Struggling with costly wide adders for signed multiplication on FPGAs? Markus Nentwig unpacks a neat bit-level trick that turns two's-complement signed-signed multiplication into a serial-parallel routine using only a one-bit wider adder. Learn how flipping sign bits and a small, controlled constant cancel lets you avoid full sign-extension, and get a parametrized Verilog RTL plus synthesis notes to try it yourself.
Stereophonic Amplitude-Panning: A Derivation of the 'Tangent Law'
Rick Lyons presents a clear geometrical derivation of the stereophonic amplitude-panning Tangent Law, filling a gap left by common references. Using vector components and the equidistant speaker assumption to keep signals in phase, he arrives at the Tangent Law and isolates practical gain formulas gL and gR needed to place an apparent source at a desired panning angle. Engineers can apply Eqs. (12) and (14) directly.
Feedback Controllers - Making Hardware with Firmware. Part 8. Control Loop Test-bed
Built around modest FPGA hardware, this post presents a practical test-bed for evaluating high-speed, low-latency feedback controllers. It covers ADC/DAC specifications, basic and arbitrary test signals, and an IFFT-based generator that can produce thousands of simultaneous tones for rapid Bode, phase, and latency measurements. The article also compares two IFFT strategies, explains turbo sampling, and shows open- and closed-loop test configurations.
Modelling a Noisy Communication Signal in MATLAB for the Analog to Digital Conversion Process
Practical signal modeling treats receiver noise as a fixed power source, not something tied to the transmitted waveform. Parth demonstrates why using MATLAB's awgn(sig,SNR,'measured') can misrepresent an analog front end and provides a short function that scales your signal so the added AWGN produces the desired receiver noise variance. This prepares realistic inputs for upcoming ADC simulations.
The Risk In Using Frequency Domain Curves To Evaluate Digital Integrator Performance
Frequency-response curves can be misleading when selecting a digital integrator, Rick Lyons shows, and he proves it with counterexamples using seven test signals. By comparing methods such as Simpson's 1/3 rule, Al-Alaoui, and Tick's rule on definite-integral tasks, Lyons demonstrates that a close match to the ideal frequency response does not guarantee accurate integrals, because input signal traits strongly affect results.
There and Back Again: Time of Flight Ranging between Two Wireless Nodes
Conventional timestamping seems too coarse for centimeter-level RF ranging, yet many products claim and deliver that precision. This post unpacks the fundamentals behind high-resolution wireless ranging, contrasting common RF approaches such as RSSI, ToA, PoA, TDoA, and AoA. It also explains how device timestamps and counter registers work, giving engineers a practical starting point for implementing or evaluating time-of-flight ranging systems.
Bayes meets Fourier
Bayes filters and Fourier transforms turn out to have a neat symmetry: prediction uses convolution, while measurement update uses multiplication. In this post, Allen Downey shows how the characteristic function ties Bayes filtering to the Fourier domain, then uses that connection to sketch an FFT-based implementation that can speed up the predict-update cycle. If you like Bayesian estimation and signal processing, this is a satisfying crossover.
Least-squares magic bullets? The Moore-Penrose Pseudoinverse
Markus Nentwig walks through a practical way to remove power-line hum from measurements using the Moore-Penrose pseudoinverse. He builds a harmonic basis, computes pinv(basis) to get least-squares coefficients, and reconstructs and subtracts the hum, with a ready-to-run Matlab example. The post highlights limits and performance: basis-like signal components will be removed, and accuracy improves with the square root of sample count.
Handy Online Simulation Tool Models Aliasing With Lowpass and Bandpass Sampling
Rick Lyons walks through Analog Devices' Frequency Folding Tool, a hands-on simulator that makes aliasing intuitive. The post shows step-by-step demos for lowpass and bandpass sampling and highlights four key behaviors: all analog components fold below Fs/2, bandpass translation, harmonic bandwidth growth, and aliased harmonics interfering with fundamentals. It’s a practical tutorial for engineers learning sampling effects.
The New Forum is LIVE!
The EmbeddedRelated forum just got a major interface refresh, and Stephane Boucher is rolling it out in beta. The new editor makes it easier to drop in images and files, add LaTeX equations with MathJax, and publish highlighted code snippets with highlight.js. Access is gated by approval for now, mainly to keep trolls, spammers, and bots out.
Project introduction: Digital Filter Blocks in MyHDL and their integration in pyFDA
Sriyash Caculo is building a bridge between filter design and hardware by implementing digital filter blocks in MyHDL and integrating them with PyFDA as part of a Google Summer of Code project. The work aims to convert PyFDA floating point designs into fixed point MyHDL blocks that automatically generate VHDL or Verilog, with tests and tutorials to ensure correctness and usability.
Implementing Simultaneous Digital Differentiation, Hilbert Transformation, and Half-Band Filtering
Recently I've been thinking about digital differentiator and Hilbert transformer implementations and I've developed a processing scheme that may be of interest to the readers here on dsprelated.com.
Access to 50+ Sessions From the DSP Online Conference
Registering for the 2023 DSP Online Conference gives you 10 months of unlimited access to 50+ on-demand DSP sessions, turning a single sign-up into a compact DSP library. Stephane highlights top-rated talks and workshops you can binge, including deep dives from fred harris and a three-hour control-loop workshop by Dan Boschen. The post points to must-watch recordings on resampling, polyphase filters, FIR design, beamforming, and more.
