Project introduction: Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo May 25, 20184 comments

Hi everyone! After a lot of hesitation and several failed attempts, I have finally entered the world of blogging. A little about myself : My name is Sriyash Caculo and I’m a third year undergrad student at BITS Pilani K.K. Birla Goa Campus  pursuing a major in Electronics and Instrumentation engineering. Being an electronics engineer, I developed an interest in Digital Signal Processing and its implementation on hardware.

This blog-post is the first of many to come for the...

Two Easy Ways To Test Multistage CIC Decimation Filters

Rick Lyons May 22, 20182 comments

This blog presents two very easy ways to test the performance of multistage cascaded integrator-comb (CIC) decimation filters [1]. Anyone implementing CIC filters should take note of the following proposed CIC filter test methods.


Figure 1 presents a multistage decimate by D CIC filter where the number of stages is S = 3. The '↓D' operation represents downsampling by integer D (discard all but every Dth sample), and n is the time index.

If the Figure 3 filter's...

ADC Clock Jitter Model, Part 2 – Random Jitter

Neil Robertson April 22, 20187 comments

In Part 1, I presented a Matlab function to model an ADC with jitter on the sample clock, and applied it to examples with deterministic jitter.  Now we’ll investigate an ADC with random clock jitter, by using a filtered or unfiltered Gaussian sequence as the jitter source.  What we are calling jitter can also be called time jitter, phase jitter, or phase noise.  It’s all the same phenomenon.  Typically, we call it jitter when we have a time-domain representation,...

Take Control of Noise with Spectral Averaging

Sam Shearman April 20, 20183 comments

Most engineers have seen the moment-to-moment fluctuations that are common with instantaneous measurements of a supposedly steady spectrum. You can see these fluctuations in magnitude and phase for each frequency bin of your spectrogram. Although major variations are certainly reason for concern, recall that we don’t live in an ideal, noise-free world. After verifying the integrity of your measurement setup by checking connections, sensors, wiring, and the like, you might conclude that the...

Linear Feedback Shift Registers for the Uninitiated, Part XIV: Gold Codes

Jason Sachs April 18, 2018

Last time we looked at some techniques using LFSR output for system identification, making use of the peculiar autocorrelation properties of pseudorandom bit sequences (PRBS) derived from an LFSR.

This time we’re going to jump back to the field of communications, to look at an invention called Gold codes and why a single maximum-length PRBS isn’t enough to save the world using spread-spectrum technology. We have to cover two little side discussions before we can get into Gold...

FFT Interpolation Based on FFT Samples: A Detective Story With a Surprise Ending

Rick Lyons April 16, 201840 comments

This blog presents several interesting things I recently learned regarding the estimation of a spectral value located at a frequency lying between previously computed FFT spectral samples. My curiosity about this FFT interpolation process was triggered by reading a spectrum analysis paper written by three astronomers [1].

My fixation on one equation in that paper led to the creation of this blog.


The notion of FFT interpolation is straightforward to describe. That is, for example,...

ADC Clock Jitter Model, Part 1 – Deterministic Jitter

Neil Robertson April 16, 201817 comments

Analog to digital converters (ADC’s) have several imperfections that affect communications signals, including thermal noise, differential nonlinearity, and sample clock jitter [1, 2].  As shown in Figure 1, the ADC has a sample/hold function that is clocked by a sample clock.  Jitter on the sample clock causes the sampling instants to vary from the ideal sample time.  This transfers the jitter from the sample clock to the input signal.

In this article, I present a Matlab...

Crowdfunding Articles?

Stephane Boucher April 12, 201828 comments

Many of you have the knowledge and talent to write technical articles that would benefit the EE community.  What is missing for most of you though, and very understandably so, is the time and motivation to do it.   

But what if you could make some money to compensate for your time spent on writing the article(s)?  Would some of you find the motivation and make the time?

I am thinking of implementing a system/mechanism that would allow the EE community to...

How precise is my measurement?

Sam Shearman March 28, 20183 comments

Some might argue that measurement is a blend of skepticism and faith. While time constraints might make you lean toward faith, some healthy engineering skepticism should bring you back to statistics. This article reviews some practical statistics that can help you satisfy one common question posed by skeptical engineers: “How precise is my measurement?” As we’ll see, by understanding how to answer it, you gain a degree of control over your measurement time.

An accurate, precise...

Embedded World 2018 - More Videos!

Stephane Boucher March 27, 20181 comment

After the interview videos last week, this week I am very happy to release two more videos taken at Embedded World 2018 and that I am proud of.  

For both videos, I made extensive use of my two new toys, a Zhiyun Crane Gimbal and a Sony a6300 camera.

The use of a gimbal like the Zhiyun makes a big difference in terms of making the footage look much more stable and cinematographic.

As for the Sony camera, it takes fantastic slow-motion footage and...

Ten Little Algorithms, Part 6: Green’s Theorem and Swept-Area Detection

Jason Sachs June 18, 20173 comments

Other articles in this series:

This article is mainly an excuse to scribble down some cryptic-looking mathematics — Don’t panic! Close your eyes and scroll down if you feel nauseous — and...

Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally

Steve Maslen November 22, 2018

This article will look at a design approach for feedback controllers featuring  low-latency "irrational" characteristics to enable the creation of physical components such as transmission lines. Some thought will also be given as to the capabilities of the currently utilized Intel Cyclone V, the new Cyclone 10 GX and the upcoming Xilinx Versal floating-point FPGAs/ACAPs.    

Fig 1. Making a Transmission Line, with the Circuit Emulator



The DFT Output and Its Dimensions

Leonid Ovanesyan December 29, 20155 comments

The Discrete Fourier Transform, or DFT, converts a signal from discrete time to discrete frequency. It is commonly implemented as and used as the Fast Fourier Transform (FFT). This article will attempt to clarify the format of the DFT output and how it is produced.

Living in the real world, we deal with real signals. The data we typically sample does not have an imaginary component. For example, the voltage sampled by a receiver is a real value at a particular point in time. Let’s...

Instantaneous Frequency Measurement

Parth Vakil February 4, 200821 comments

I would like to talk about the oft used method of measuring the carrier frequency in the world of Signal Collection and Characterization world. It is an elegant technique because of its simplicity. But, of course, with simplicity, there come drawbacks (sometimes...especially with this one!).

In the world of Radar detection and characterization, one of the key characteristics of interest is the carrier frequency of the signal. If the radar is pulsed, you will have a very wide bandwidth, a...

Shared-multiplier polyphase FIR filter

Markus Nentwig July 31, 20135 comments

Keywords: FPGA, interpolating decimating FIR filter, sample rate conversion, shared multiplexed pipelined multiplier

Discussion, working code (parametrized Verilog) and Matlab reference design for a FIR polyphase resampler with arbitrary interpolation and decimation ratio, mapped to one multiplier and RAM.


A polyphase filter can be as straightforward as multirate DSP ever gets, if it doesn't turn into a semi-deterministic, three-legged little dance between input, output and...

Design of an anti-aliasing filter for a DAC

Markus Nentwig August 18, 2012
  • Octaveforge / Matlab design script. Download: here
  • weighted numerical optimization of Laplace-domain transfer function
  • linear-phase design, optimizes vector error (magnitude and phase)
  • design process calculates and corrects group delay internally
  • includes sinc() response of the sample-and-hold stage in the ADC
  • optionally includes multiplierless FIR filter
Problem Figure 1: Typical FIR-DAC-analog lowpass line-up

Digital-to-analog conversion connects digital...

Recruiting New Bloggers!

Stephane Boucher October 16, 20157 comments

Previous calls for bloggers have been very successful in recruiting some great communicators - Rick LyonsJason Sachs, Victor Yurkovsky, Mike Silva, Markus NentwigGene BrenimanStephen Friederichs,

Understanding Radio Frequency Distortion

Markus Nentwig September 26, 20102 comments

The topic of this article are the effects of radio frequency distortions on a baseband signal, and how to model them at baseband. Typical applications are use as a simulation model or in digital predistortion algorithms.


Transmitting and receiving wireless signals usually involves analog radio frequency circuits, such as power amplifiers in a transmitter or low-noise amplifiers in a receiver.Signal distortion in those circuits deteriorates the link quality. When...

Spline interpolation

Markus Nentwig May 11, 20147 comments

A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog


Splines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...

A Simple Complex Down-conversion Scheme

Rick Lyons January 21, 20087 comments
Recently I was experimenting with complex down-conversion schemes. That is, generating an analytic (complex) version, centered at zero Hz, of a real bandpass signal that was originally centered at ±fs/4 (one fourth the sample rate). I managed to obtain one such scheme that is computationally efficient, and it might be of some mild interest to you guys. The simple complex down-conversion scheme is shown in Figure 1(a).

It works like this: say we have a real xR(n) input bandpass...