Evaluate Window Functions for the Discrete Fourier Transform
Spectral leakage makes DFTs of continuous sinewaves misleading, and windowing is the practical workaround. This post supplies Matlab code to plot spectra of windowed sinewaves and compute figures of merit, so you can compare windows such as flattop and Chebyshev. See how sidelobe level, mainlobe bandwidth, processing loss, noise bandwidth, and scallop loss trade off to guide your window choice.
Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally
A practical approach to emulating lossy transmission lines in real time, using pole-zero approximations to replace irrational s-domain behaviors and enable FPGA implementation. The author shows 8-pole/zero fits for Zo(s) and a 6-pole/zero plus delay for P(s), validated against LTSpice and MATLAB. Conversion to sampled-data Zo(z) and biquad implementations is detailed, along with issues in single-precision arithmetic and mitigations such as mixed sample rates and partial-fraction decomposition.
Polar Coding Notes: A Simple Proof
Lyons Zhang presents a compact, elementary derivation of channel polarization for binary-input discrete memoryless channels. The note leverages Mrs. Gerber's Lemma to bound conditional entropies and follows the Alsan-Telatar averaging argument to show mediocre channels vanish. The proof sidesteps martingale convergence and recovers the standard result that the fraction of good channels approaches the channel capacity.
Polar Coding Notes: Channel Combining and Channel Splitting
Lyons Zhang walks through the core algebra of polar coding, showing how channel combining builds the vector channel W_N from N copies of a binary-input DMC using the polar transform G_N = B_N F^{⊗n}. The notes then define channel splitting, derive the coordinate-channel transition probabilities from the chain rule, and present the recursive formulas that let you compute W_{2N}^{(2i-1)} and W_{2N}^{(2i)} from W_N^{(i)}.
Project Report : Digital Filter Blocks in MyHDL and their integration in pyFDA
This Summer of Code project shows how to move from Python filter design to synthesizable HDL by building a MyHDL "filter-blocks" package and connecting it to PyFDA. The author implemented direct form I FIR and IIR blocks, added an API, tests, tutorials, and PyFDA export to VHDL and Verilog. The report also highlights practical fixed-point design choices and remaining work such as second-order sections.
Sensors Expo - Trip Report & My Best Video Yet!
Stephane Boucher turns a first-time Sensors Expo visit into a fun travelogue and a polished conference highlights video. He mixes candid trip anecdotes from Moncton to San Jose, electric-scooter discoveries, Santa Cruz detours, Airbnb tips, and on-the-floor expo footage. The post culminates in what he calls his best highlights reel yet, plus a follow-up video focused on embedded and IoT.
Design a DAC sinx/x Corrector
Neil Robertson provides a compact Matlab function and coefficient tables for designing linear-phase FIR sinx/x correctors to undo the DAC sinc roll-off. The post explains the sinc_corr(ntaps,fmax,fs) call, shows worked examples with ntaps=5 and different fmax values, and demonstrates fixed-point quantization including a k=512 example and CSD digit guidance. Practical notes cover corrector gain and input back-off to avoid clipping.
Off Topic: Refraction in a Varying Medium
Cedron Dawg derives a compact vector differential equation for a point particle moving through a smoothly varying refractive medium using the Euler-Lagrange variational method. By introducing a log refractive index called "fluff density," the paper expresses acceleration purely in terms of the fluff gradient and velocity, then explores curvature, superposition, and point-source capture radii with simple closed-form results.
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
This article demonstrates combining DSP and feedback-control on an Intel Cyclone floating-point FPGA to build low-latency closed-loop circuit emulators and controllers. Using a single floating-point biquad at 1.6 Msps, an IFFT multi-tone 4.096 ms capture for wideband measurement, and MATLAB references for verification, the author achieves sub-nanosecond timing insight and applies DSP phase compensation to cancel about 100 pF of PCB parasitics.
Project update-2 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This update shows a working integration between Pyfda and MyHDL using a compact API that passes fixed-point coefficients, stimulus data, and returns simulated filter responses. It walks through two usage styles, constructor-based and setter-method-based, and demonstrates a Pyfda workflow from specs to MyHDL simulation and plotting. Future plans include HDL code generation and API extension as filters grow.
Somewhat Off Topic: Deciphering Transistor Terminology
Rick Lyons unpacks a small linguistic mystery in electronics, revealing why the transistor's middle terminal is called the "base". He traces the name to the 1949 Bell Labs "semiconductor triode", where the device sat on a metal base plate described as a large-area low-resistance contact, and notes that later transistor sandwich designs kept the name for historical reasons. The post includes original references and a few trivia nuggets.
Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT
Cedron Dawg derives closed-form three-bin frequency estimators for a pure complex tone in a DFT using a linear algebra view that treats three adjacent bins as a vector. He shows any vector K orthogonal to [1 1 1] yields a = (K·Z)/(K·D·Z) and derives practical K choices including a Von Hann (Pascal) kernel and a data-driven projection. The post compares estimators under noise and gives simple selection rules.
DFT Graphical Interpretation: Centroids of Weighted Roots of Unity
DFT bin values can be seen as centroids of weighted roots of unity, a geometric picture that makes many DFT properties immediate. Cedron Dawg uses the geometric-series identity and polar plots of integer and fractional tones to show why constants appear only at DC, how wrapping relates to bin index, and how phase, scaling, offsets, and real-signal symmetry affect bin magnitudes and angles.
Digital PLL's, Part 3 -- Phase Lock an NCO to an External Clock
Phase-locking a numerically controlled oscillator to an external clock that is unrelated to system clocks is practical and largely unexplored. Neil Robertson presents a time-domain digital PLL that converts the ADC-sampled clock into I/Q with a Hilbert transformer and measures phase error with a compact complex phase detector. The post shows loop-filter coefficient formulas and simulations that reveal how ADC quantization and Gaussian clock noise map into NCO phase noise and how loop bandwidth shapes the result.
Plotting Discrete-Time Signals
Neil Robertson demonstrates a practical interpolate-by-8 FIR approach to make sampled signals look like their continuous-time counterparts when plotted. The post explains a 121-tap filter designed for signals up to 0.4*fs, shows Matlab examples for a sinusoid and a filtered pulse, and highlights the transient and design trade-offs so you can reproduce clean plots with the supplied interp_by_8.m code.
Algebra's Laws of Powers and Roots: Handle With Care
Rick Lyons shows that familiar power and root rules from algebra can break down when exponents are complex. He tests common identities for two scenarios, real and fully complex exponents, with positive and negative mantissas, and compiles a table of cases that sometimes fail. The post includes MATLAB examples that reproduce counterexamples and a clear warning to numerically verify algebraic steps involving complex powers.
The Most Interesting FIR Filter Equation in the World: Why FIR Filters Can Be Linear Phase
Rick Lyons pulls back the curtain on a little-known coefficient constraint that makes complex-coefficient FIR filters exhibit linear phase. Rather than simple symmetry of real coefficients, the key is a conjugate-reflection relation involving the filter phase at DC, which collapses to ordinary symmetry for real taps. The post includes derivations, intuition using the inverse DTFT, and a Matlab example to verify the result.
Design a DAC sinx/x Corrector
Neil Robertson provides a compact Matlab function and coefficient tables for designing linear-phase FIR sinx/x correctors to undo the DAC sinc roll-off. The post explains the sinc_corr(ntaps,fmax,fs) call, shows worked examples with ntaps=5 and different fmax values, and demonstrates fixed-point quantization including a k=512 example and CSD digit guidance. Practical notes cover corrector gain and input back-off to avoid clipping.
Half-band filter on Xilinx FPGA
Lyons Zhang shows a practical, high-throughput implementation of a symmetric systolic half-band FIR on Xilinx FPGAs using DSP48 slices. The post includes a two-channel interleaved downsample-by-2 Verilog module, pipeline mapping to DSP48, and a symmetric rounding trick to reduce the DC shift from truncation. It highlights performance-and-latency tradeoffs and gives working code you can drop into a Spartan-6 style flow.
Generating Complex Baseband and Analytic Bandpass Signals
Rick Lyons gathers and compares practical methods for creating complex baseband and analytic bandpass signals in one compact reference. The post clarifies definitions, lists time and frequency domain techniques from quadrature sampling to FFT-based analytic generation, and notes implementation tradeoffs such as sample-rate constraints, Hilbert transformer use, and phase linearity concerns. Engineers get a quick Hit Parade of options and pointers to deeper references.
The Discrete Fourier Transform and the Need for Window Functions
The FFT alone can mislead: capturing a finite-length signal with a rectangular window smears energy across frequency, producing spectral leakage that hides real components. This post explains the origin of leakage, shows how tapered windows such as the Hanning window suppress sidelobes, and demonstrates the tradeoff between sidelobe suppression and mainlobe widening while covering practical tips on zero-padding and record length.
How precise is my measurement?
Precision is quantifiable, not guesswork. This post walks through practical, measurement-oriented statistics you can apply to static or dynamic signals to answer the question, "How precise is my measurement?" It focuses on using multiple samples, checking distribution assumptions, and constructing confidence intervals and levels so you can trade measurement time for a desired precision.
New Comments System (please help me test it)
DSPRelated just got a practical upgrade, Stephane Boucher has released a new comments system built from his earlier forum work. It supports drag-and-drop or Insert Image uploads, MathML, TeX and ASCIImath rendered by MathJax, syntax-highlighted code via highlight.js, and in-place editing and deletion of comments. Improved email notifications alert authors and commenters to replies, and readers are invited to post test comments and report problems.
Demonstrating the Periodic Spectrum of a Sampled Signal Using the DFT
This post makes a basic DSP principle tangible by computing the DFT over an extended set of bins and plotting the results. It demonstrates that a sampled signal's spectrum repeats every sampling rate, explains the k-to-frequency mapping, and contrasts common bin ranges such as 0..N-1 and -N/2..N/2-1. The write-up also highlights symmetry for real sequences and recommends using the FFT for efficiency.
Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
Negative-latency DSP can cancel ADC, FPGA/DSP, DAC and propagation delays to deliver near-zero unwanted latency filtering. Steve Maslen explains how to split a digital filter into a simple feed gain b0 and an advanced DF3 block that produces samples one sample early, then recombine them so sampled-data delays cancel. MATLAB c2d examples, a PID case study and FPGA test-bed results show the technique is practical and proven, with active IP noted.
Should DSP Undergraduate Students Study z-Transform Regions of Convergence?
Rick Lyons argues z-transform regions of convergence are mostly a classroom abstraction with little practical use for real-world DSP engineers. For all stable LTI impulse responses encountered in practice the ROC includes the unit circle, so DTFT and DFT exist and ROC analysis rarely affects implementation. He notes digital oscillators are a notable exception, and suggests reallocating classroom time to more practical engineering topics.
DAC Zero-Order Hold Models
This article provides two simple time-domain models of a DAC’s zero-order hold. These models will allow us to find time and frequency domain approximations of DAC outputs, and simulate analog filtering of those outputs. Developing the models is also a good way to learn about the DAC ZOH function.
Half-band filter on Xilinx FPGA
Lyons Zhang shows a practical, high-throughput implementation of a symmetric systolic half-band FIR on Xilinx FPGAs using DSP48 slices. The post includes a two-channel interleaved downsample-by-2 Verilog module, pipeline mapping to DSP48, and a symmetric rounding trick to reduce the DC shift from truncation. It highlights performance-and-latency tradeoffs and gives working code you can drop into a Spartan-6 style flow.
A Simple Complex Down-conversion Scheme
Recently I was experimenting with complex down-conversion schemes. That is, generating an analytic (complex) version, centered at zero Hz, of a real bandpass signal that was originally centered at ±fs/4 (one fourth the sample rate). I managed to obtain one such scheme that is computationally efficient, and it might be of some mild interest to you guys. The simple complex down-conversion scheme is shown in Figure 1(a).It works like this: say we have a real xR(n) input bandpass...
Discrete Wavelet Transform Filter Bank Implementation (part 1)
David Valencia walks through a practical implementation of discrete wavelet transform filter banks, focusing on cascading branches and efficient equivalent filters. He contrasts DWT and DFT resolution behavior and shows how cascading the low-pass branch sharpens frequency division while the high-pass path remains unchanged. Code pointers and a preview of formfilters() demonstrate how to compute only the needed samples by combining filters with upsampling.
