Linear Feedback Shift Registers for the Uninitiated, Part XII: Spread-Spectrum Fundamentals
Last time we looked at the use of LFSRs for pseudorandom number generation, or PRNG, and saw two things:
- the use of LFSR state for PRNG has undesirable serial correlation and frequency-domain properties
- the use of single bits of LFSR output has good frequency-domain properties, and its autocorrelation values are so close to zero that they are actually better than a statistically random bit stream
The unusually-good correlation properties...
An Efficient Linear Interpolation Scheme
This blog presents a computationally-efficient linear interpolation trick that requires at most one multiply per output sample.
Background: Linear Interpolation
Looking at Figure 1(a) let's assume we have two points, [x(0),y(0)] and [x(1),y(1)], and we want to compute the value y, on the line joining those two points, associated with the value x.
Figure 1: Linear interpolation: given x, x(0), x(1), y(0), and y(1), compute the value of y. ...
An Alternative Form of the Pure Real Tone DFT Bin Value Formula
Introduction
This is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by deriving alternative exact formulas for the bin values of a real tone in a DFT. The derivation of the source equations can be found in my earlier blog article titled "DFT Bin Value Formulas for Pure Real Tones"[1]. The new form is slighty more complicated and calculation intensive, but it is more computationally accurate in the vicinity of near integer frequencies. This...
Design IIR Butterworth Filters Using 12 Lines of Code
While there are plenty of canned functions to design Butterworth IIR filters [1], it’s instructive and not that complicated to design them from scratch. You can do it in 12 lines of Matlab code. In this article, we’ll create a Matlab function butter_synth.m to design lowpass Butterworth filters of any order. Here is an example function call for a 5th order filter:
N= 5 % Filter order fc= 10; % Hz cutoff freq fs= 100; % Hz sample freq [b,a]=...Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
Simplest Calculation of Half-band Filter Coefficients
Half-band filters are lowpass FIR filters with cut-off frequency of one-quarter of sampling frequency fs and odd symmetry about fs/4 [1]*. And it so happens that almost half of the coefficients are zero. The passband and stopband bandwiths are equal, making these filters useful for decimation-by-2 and interpolation-by-2. Since the zero coefficients make them computationally efficient, these filters are ubiquitous in DSP systems.
Here we will compute half-band...
Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.
This part of the on-going series of articles looks at a variety of aspects concerning the FPGA device which provides the high-speed maths capability for the low-latency controller and the arbitrary circuit generator application. In due course a complete specification along with application examples will be maintained on the project website here.- Part 5: Some FPGA Aspects (this part)
- Part 4: Engineering of...
Improved Three Bin Exact Frequency Formula for a Pure Real Tone in a DFT
IntroductionThis is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by extending the exact two bin formulas for the frequency of a real tone in a DFT to the three bin case. This article is a direct extension of my prior article "Two Bin Exact Frequency Formulas for a Pure Real Tone in a DFT"[1]. The formulas derived in the previous article are also presented in this article in the computational order, rather than the indirect order they were...
There's No End to It -- Matlab Code Plots Frequency Response above the Unit Circle
Reference [1] has some 3D plots of frequency response magnitude above the unit circle in the Z-plane. I liked them enough that I wrote a Matlab function to plot the response of any digital filter this way. I’m not sure how useful these plots are, but they’re fun to look at. The Matlab code is listed in the Appendix.This post is available in PDF format for easy...
There and Back Again: Time of Flight Ranging between Two Wireless Nodes
With the growth in the Internet of Things (IoT) products, the number of applications requiring an estimate of range between two wireless nodes in indoor channels is growing very quickly as well. Therefore, localization is becoming a red hot market today and will remain so in the coming years.
One question that is perplexing is that many companies now a days are offering cm level accurate solutions using RF signals. The conventional wireless nodes usually implement synchronization...
Ten Little Algorithms, Part 6: Green’s Theorem and Swept-Area Detection
Other articles in this series:
- Part 1: Russian Peasant Multiplication
- Part 2: The Single-Pole Low-Pass Filter
- Part 3: Welford's Method (And Friends)
- Part 4: Topological Sort
- Part 5: Quadratic Extremum Interpolation and Chandrupatla's Method
This article is mainly an excuse to scribble down some cryptic-looking mathematics — Don’t panic! Close your eyes and scroll down if you feel nauseous — and...
ADC Clock Jitter Model, Part 1 – Deterministic Jitter
Analog to digital converters (ADC’s) have several imperfections that affect communications signals, including thermal noise, differential nonlinearity, and sample clock jitter [1, 2]. As shown in Figure 1, the ADC has a sample/hold function that is clocked by a sample clock. Jitter on the sample clock causes the sampling instants to vary from the ideal sample time. This transfers the jitter from the sample clock to the input signal.
In this article, I present a Matlab...
Setting Carrier to Noise Ratio in Simulations
When simulating digital receivers, we often want to check performance with added Gaussian noise. In this article, I’ll derive the simple equations for the rms noise level needed to produce a desired carrier to noise ratio (CNR or C/N). I also provide a short Matlab function to generate a noise vector of the desired level for a given signal vector.
Definition of C/NThe Carrier to noise ratio is defined as the ratio of average signal power to noise power for a modulated...
Discrete Wavelet Transform Filter Bank Implementation (part 1)
UPDATE: Added graphs and code to explain the frequency division of the branches
The focus of this article is to briefly explain an implementation of this transform and several filter bank forms. Theoretical information about DWT can be found elsewhere.
First of all, a 'quick and dirty' simplified explanation of the differences between DFT and DWT:
The DWT (Discrete Wavelet Transform), simply put, is an operation that receives a signal as an input (a vector of data) and...
Padé Delay is Okay Today
This article is going to be somewhat different in that I’m not really writing it for the typical embedded systems engineer. Rather it’s kind of a specialized topic, so don’t be surprised if you get bored and move on to something else. That’s fine by me.
Anyway, let’s just jump ahead to the punchline. Here’s a numerical simulation of a step response to a \( p=126, q=130 \) Padé approximation of a time delay:
Impressed? Maybe you should be. This...
Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
This final article in the series will look at -ve latency DSP and how it can be used to cancel the unwanted delays in sampled-data systems due to such factors as Nyquist filtering, ADC acquisition, DSP/FPGA algorithm computation time, DAC reconstruction and circuit propagation delays.Some applications demand zero-latency or zero unwanted latency signal processing. Negative latency DSP may sound like the stuff of science fiction or broken physics but the arrangement as...
Adaptive Beamforming is like Squeezing a Water Balloon
Adaptive beamforming was first developed in the 1960s for radar and sonar applications. The main idea is that signals can be captured using multiple sensors and the sensor outputs can be combined to enhance the signals propagating from specific directions and attenuate (null out) signals from other directions. It has grown immensely in recent years as processors have become faster and cheaper. Today, adaptive beamforming applications include smart speakers (like the Amazon Echo),...
The DFT Output and Its Dimensions
The Discrete Fourier Transform, or DFT, converts a signal from discrete time to discrete frequency. It is commonly implemented as and used as the Fast Fourier Transform (FFT). This article will attempt to clarify the format of the DFT output and how it is produced.
Living in the real world, we deal with real signals. The data we typically sample does not have an imaginary component. For example, the voltage sampled by a receiver is a real value at a particular point in time. Let’s...
Reduced-Delay IIR Filters
This blog gives the results of a preliminary investigation of reduced-delay (reduced group delay) IIR filters based on my understanding of the concepts presented in a recent interesting blog by Steve Maslen [1].
Development of a Reduced-Delay 2nd-Order IIR Filter
Maslen's development of a reduced-delay 2nd-order IIR filter begins with a traditional prototype filter, HTrad, shown in Figure 1(a). The first modification to the prototype filter is to extract the b0 feedforward coefficient...
A Fast Real-Time Trapezoidal Rule Integrator
This blog presents a computationally-efficient network for computing real‑time discrete integration using the Trapezoidal Rule.
Background
While studying what is called "N-sample Romberg integration" I noticed that such an integration process requires the computation of many individual smaller‑sized integrations using the Trapezoidal Rule integration method [1]. My goal was to create a computationally‑fast real‑time Trapezoidal Rule integration network to increase the processing...
Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally
This article will look at a design approach for feedback controllers featuring low-latency "irrational" characteristics to enable the creation of physical components such as transmission lines. Some thought will also be given as to the capabilities of the currently utilized Intel Cyclone V, the new Cyclone 10 GX and the upcoming Xilinx Versal floating-point FPGAs/ACAPs.
Fig 1. Making a Transmission Line, with the Circuit Emulator
Additional...
Some Observations on Comparing Efficiency in Communication Systems
Introduction
Engineering is usually about managing efficiencies of one sort or another. One of my favorite working definitions of an engineer says, "An engineer is somebody who can do for a nickel what any damn fool can do for a dollar." In that case, the implication is that the cost is one of the characteristics being optimized. But cost isn't always the main efficiency metric, or at least the only one. Consider how a common transportation appliance, the automobile, is optimized...
Half-band filter on Xilinx FPGA
1. DSP48 Slice in Xilinx FPGA
There are many DSP48 Slices in most Xilinx® FPGAs, one DSP48 slice in Spartan6® FPGA is shown in Figure 1, the structure may different depending on the device, but broadly similar.
Figure 1: A whole DSP48A1 Slice in Spartan6 (www.xilinx.com)
2. Symmetric Systolic Half-band FIRFigure 2: Symmetric Systolic Half-band FIR Filter
3. Two-channel Symmetric Systolic Half-band FIRFigure 3: 2-Channel...
Multiplying Two Binary Numbers
I just encountered what I think is an interesting technique for multiplying two integer numbers. Perhaps some of the readers here will also find it interesting.
Here's the technique: assume we want to multiply 18 times 17. We start by writing 18 and 17, side-by-side in column A and column B, as shown at the top of Figure 1. Next we divide the 18 at the top of column A by two, retaining only the integer part of the division, and double the 17 at the top of column B. The results of those two...
Two jobs
For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.
edit - video of the event:
I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other...
An Astounding Digital Filter Design Application
I've recently encountered a digital filter design application that astonished me with its design flexibility, capability, and ease of use. The software is called the "ASN Filter Designer." After experimenting with a demo version of this filter design software I was so impressed that I simply had publicize it to the subscribers here on dsprelated.com.
What I Liked About the ASN Filter DesignerWith typical filter design software packages the user enters numerical values for the...
Frequency Translation by Way of Lowpass FIR Filtering
Some weeks ago a question appeared on the dsp.related Forum regarding the notion of translating a signal down in frequency and lowpass filtering in a single operation [1]. It is possible to implement such a process by embedding a discrete cosine sequence's values within the coefficients of a traditional lowpass FIR filter. I first learned about this process from Reference [2]. Here's the story.
Traditional Frequency Translation Prior To FilteringThink about the process shown in...
Benford's law solved with DSP
I have a longtime interest in the mystery of 1/f noise. A few years ago I came across Benford’s law, another puzzle that seemed to have many of the same characteristics.
Suppose you collect a large group of seemingly random numbers, such as might appear in a newspaper or financial report. Benford’s law relates to the leading digit of each number, such as "4" in 4.268, "3" in 0.0312, and "9" in -932.34. Since there are nine possible leading digits...
Time-Domain Periodicity and the Discrete Fourier Transform
Introduction
The Discrete Fourier Transform (DFT) and it's fast-algorithm implementation, the Fast Fourier Transform (FFT), are fundamental tools for processing and analysis of digital signals. While the continuous Fourier Transform and its inverse integrate over all time from minus infinity to plus infinity, and all frequencies from minus infinity to plus infinity, practical application of its discrete cousins can only be made over finite time and frequency intervals. The discrete nature...
Design study: 1:64 interpolating pulse shaping FIR
This article is the documentation to a code snippet that originated from a discussion on comp.dsp.
The task is to design a root-raised cosine filter with a rolloff of a=0.15 that interpolates to 64x the symbol rate at the input.
The code snippet shows a solution that is relatively straightforward to design and achieves reasonably good efficiency using only FIR filters.
Motivation: “simple solutions?”
