Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA
By week 5 the project delivered parameterized MyHDL implementations of multiple digital filter topologies and started integration with PyFDA. The post walks through a behavioral direct-form I FIR, cascaded second-order-section implementations for FIR and IIR using structural modeling, and a parallel IIR design that concatenates per-section outputs for final summation. All designs infer order and coefficients from PyFDA, with examples in the filter-blocks repository.
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Jason Sachs demystifies Reed-Solomon codes with hands-on examples and pragmatic tips for embedded engineers. The article shows why RS encoding is just polynomial division in GF(2^m), why decoding is mathematically heavier, and how to implement encoders in Python and in C-friendly form using LFSRs and table-driven methods. Read this for working code, generator-polynomial examples, and an embedded-minded view of RS practicalities.
Linear Feedback Shift Registers for the Uninitiated, Part XV: Error Detection and Correction
CRCs and Hamming codes look a lot less magical when you view them as redundancy with a purpose. Jason Sachs walks from parity bits and checksums into finite-field polynomial arithmetic, then shows how CRCs map cleanly onto LFSRs and how Hamming codes use syndromes to locate single-bit errors. It is a practical tour of error detection and correction, with enough worked examples to make the theory feel usable.
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
Stephane Boucher is heading to Sensors Expo in San Jose for the first time, and he is bringing cameras to capture demos and build a highlights video. He is also looking for roommates for a roomy Airbnb near the convention center, plus local tips for making the most of a free day in the Bay Area. If you are attending, there is also a registration discount code and a VIP pass giveaway in the mix.
Digital PLL's, Part 3 -- Phase Lock an NCO to an External Clock
Phase-locking a numerically controlled oscillator to an external clock that is unrelated to system clocks is practical and largely unexplored. Neil Robertson presents a time-domain digital PLL that converts the ADC-sampled clock into I/Q with a Hilbert transformer and measures phase error with a compact complex phase detector. The post shows loop-filter coefficient formulas and simulations that reveal how ADC quantization and Gaussian clock noise map into NCO phase noise and how loop bandwidth shapes the result.
Project introduction: Digital Filter Blocks in MyHDL and their integration in pyFDA
Sriyash Caculo is building a bridge between filter design and hardware by implementing digital filter blocks in MyHDL and integrating them with PyFDA as part of a Google Summer of Code project. The work aims to convert PyFDA floating point designs into fixed point MyHDL blocks that automatically generate VHDL or Verilog, with tests and tutorials to ensure correctness and usability.
Two Easy Ways To Test Multistage CIC Decimation Filters
Rick Lyons shows that you can validate multistage CIC decimation filters with just two obvious tests, no elaborate spectral setup required. Apply a unit-sample impulse to check a combinatorial yout(1) value when D ≥ S, or feed an all-ones step to confirm an S-sample transient followed by a DS steady state; the Appendix ties both checks to Pascal's triangle and binomial math.
ADC Clock Jitter Model, Part 2 – Random Jitter
Neil Robertson shows how to simulate ADC sample-clock random jitter in Matlab, moving from band-limited Gaussian noise to wideband and close-in phase noise. The post highlights practical artifacts such as aliasing of wideband clock noise, the 20*log10 dependence of jitter sidebands on input frequency, and why cubic interpolation plus a custom noise_filter produces accurate rms and spectral results engineers can trust.
Take Control of Noise with Spectral Averaging
Spectral averaging turns noisy FFT outputs into repeatable, measurable spectra by trading time for noise control. This post explains the practical difference between RMS averaging, which reduces variance without changing the noise floor, and vector averaging, which can lower the noise floor but requires phase-coherent, triggered inputs. It also shows how linear and exponential weighting affect reaction time for live displays and measurement accuracy.
Linear Feedback Shift Registers for the Uninitiated, Part XIV: Gold Codes
Gold codes solve a practical spread-spectrum problem, sharing one PRBS across many transmitters eventually runs into ugly synchronization and correlation issues. Jason Sachs walks through why shifted copies of a single LFSR sequence are not enough, then shows how preferred pairs of m-sequences create a family of Gold codes with bounded cross-correlation. The post wraps with Python experiments and a UART DSSS demo that decodes multiple overlapping messages cleanly.
Amplitude modulation and the sampling theorem
Amplitude modulation turns out to be a neat way to build intuition for the Nyquist-Shannon sampling theorem. In this draft chapter from Think DSP, the author shows how multiplying by a carrier shifts spectra, why sampling creates repeated copies in frequency, and how low-pass filtering can recover the original signal when those copies do not overlap.
Understanding Radio Frequency Distortion
Markus Nentwig breaks down how analog RF nonlinearities appear in a complex baseband model so you can simulate and predistort real transmitters. The article shows that even-order terms vanish in-band under narrowband assumptions, while odd-order products collapse to |BB(t)|^(n-1) BB(t) and do not depend on the carrier frequency. It also explains bandwidth scaling and includes a MATLAB example plus measured PA coefficients.
Instant CIC
Modeling CIC decimators in floating point is simpler than you might think, Markus Nentwig shows, if you treat the filter as a finite FIR by sampling its impulse response. The post compares a naive float time-domain implementation, an FFT-based frequency-domain approach, and the recommended method of computing the impulse response and using an off-the-shelf FIR filter, with code and plots.
The Number 9, Not So Magic After All
Rick Lyons dismantles the mystique around the number 9 by showing its 'magic' stems from our base-10 system rather than any unique numeral power. He walks through classic 9 tricks, including digit-sum divisibility, digital-root behavior, and division patterns, then generalizes them to base-B where digit B-1 plays the same role. The post is a short, playful link between recreational arithmetic and radix thinking.
ES Week Emphasis on Component Based Design
ES Week in Salzburg brought a strong theme into focus, component based design and automation for embedded and MPSoC systems. Praveen Raghavan highlights a few standout keynotes and industry talks, from SDR evolution at Infineon to Tensilica’s push toward instruction set extension and MPSoC assembly. He also notes Toshiba’s new VLIW vector processor for image and video front ends, along with the compiler challenges that come with it.
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Free DSP Books on the Internet - Part Deux
Rick Lyons updates his curated list of freely downloadable DSP textbooks, adding titles across communications, implementation, spectral analysis, audio restoration, mathematics and music theory. The post highlights readable introductions like Prandoni and Vetterli's Signal Processing for Communications and Vetterli and Kovacevic's Wavelets and Subband Coding, while reminding readers that these copyrighted books are free only for individual download and not for redistribution.
State Space Representation and the State of Engineering Thinking
State space is common in control, but it shows up much less often in signal processing. This post argues that the difference is really about engineering priorities: for many DSP problems, transfer functions are enough, while state space becomes valuable when internal behavior matters, like filter scaling or Kalman filtering. It is a short, practical look at why engineers choose one model over the other.
Are DSPs Dead ?
Jeff Brower argues that the science of digital signal processing is far from dead, but commercial DSP chips lost momentum when Texas Instruments refused to embrace server-centric AI and 5G markets. He traces how TI's embedded-only culture, halted multicore CPU roadmaps, and lack of server-class products pushed customers to GPUs and FPGAs. A comeback would demand PCIe cards, VM and container support, open-source engagement, and bold leadership.
Simulink-Simulation of SSB demodulation
This post walks through Simulink models that implement SSB demodulation and modulation, using Richard Lyons' phasing method as a foundation. It shows practical models for simple carrier multiplication and for the phasing method with cosine and -sin paths plus Hilbert filtering, and it highlights sampling, decimation, filter choices, and delay alignment to make the techniques work in simulation.
Compute Modulation Error Ratio (MER) for QAM
Neil Robertson shows how to define and compute Modulation Error Ratio (MER) for QAM using a simplified baseband model and decision-slice errors. The post derives per-symbol and averaged MER formulas, explains when MER tracks carrier-to-noise ratio under AWGN and matched root-Nyquist filters, and provides example Pav values for QAM-16 and QAM-64 plus a Matlab script and practical tips.
Instantaneous Frequency Measurement
Measuring carrier frequency quickly and with minimal data matters in radar and signal characterization. Parth Vakil explains the delay-and-multiply instantaneous frequency measurement technique, shows how analytic signals and multiple delays resolve the 2π ambiguity, and demonstrates noise, phase-wrapping, and interferer effects using MATLAB code. He also outlines practical mitigations like phase unwrapping and channelization.
Launch of Youtube Channel: My First Videos - Embedded World 2017
Stephane Boucher turned his Embedded World 2017 trip into a debut YouTube series of short booth highlight videos. He walks through the steep learning curve of trade-show filming, the specific gear he bought and rented to cope with low light and noise, and the practical mistakes he plans to fix. The post lists filmed vendors and asks readers for feedback to improve future episodes.
The DFT of Finite-Length Time-Reversed Sequences
Rick Lyons digs into a surprisingly under-documented corner of DSP, showing how finite-length time reversal changes a sequence's DFT. The post distinguishes flip and circular time-reversal, gives closed-form DFT relationships, and explains why modulo N arithmetic matters. Engineers get ready-to-use tables and derivations that clarify when and how time reversal affects spectral analysis.
Linear Feedback Shift Registers for the Uninitiated, Part XIV: Gold Codes
Gold codes solve a practical spread-spectrum problem, sharing one PRBS across many transmitters eventually runs into ugly synchronization and correlation issues. Jason Sachs walks through why shifted copies of a single LFSR sequence are not enough, then shows how preferred pairs of m-sequences create a family of Gold codes with bounded cross-correlation. The post wraps with Python experiments and a UART DSSS demo that decodes multiple overlapping messages cleanly.
Sensors Expo - Trip Report & My Best Video Yet!
Stephane Boucher turns a first-time Sensors Expo visit into a fun travelogue and a polished conference highlights video. He mixes candid trip anecdotes from Moncton to San Jose, electric-scooter discoveries, Santa Cruz detours, Airbnb tips, and on-the-floor expo footage. The post culminates in what he calls his best highlights reel yet, plus a follow-up video focused on embedded and IoT.
Amplitude modulation and the sampling theorem
Amplitude modulation turns out to be a neat way to build intuition for the Nyquist-Shannon sampling theorem. In this draft chapter from Think DSP, the author shows how multiplying by a carrier shifts spectra, why sampling creates repeated copies in frequency, and how low-pass filtering can recover the original signal when those copies do not overlap.
Time-Domain Periodicity and the Discrete Fourier Transform
Finite-length observation windows change how tones appear in a DFT, and Eric Jacobsen shows how the convolution theorem explains the familiar sin(x)/x main lobe and sidelobes. He contrasts two consistent viewpoints: viewing the DFT as a windowed signal convolved with the window transform, or as the transform of a periodically repeated sequence. Practical tips on zero-padding, bin spacing, and phase effects help avoid common misinterpretations.
Linear Feedback Shift Registers for the Uninitiated, Part XV: Error Detection and Correction
CRCs and Hamming codes look a lot less magical when you view them as redundancy with a purpose. Jason Sachs walks from parity bits and checksums into finite-field polynomial arithmetic, then shows how CRCs map cleanly onto LFSRs and how Hamming codes use syndromes to locate single-bit errors. It is a practical tour of error detection and correction, with enough worked examples to make the theory feel usable.
Design study: 1:64 interpolating pulse shaping FIR
Markus Nentwig presents a practical 1:64 root-raised cosine interpolator built from cascaded FIR stages that slashes computational cost. By separating pulse shaping from rate conversion, designing each interpolator to suppress only known alias bands, and equalizing the pulse shape, the design achieves just 4.69 MACs per output, roughly 12 percent of a straight polyphase implementation while meeting EVM targets.
