Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Optimizing the Half-band Filters in Multistage Decimation and Interpolation
Multistage decimation and interpolation by powers of two get a lot cheaper if you size each half-band filter differently. Rick Lyons walks through spectra for three-stage examples that show why early stages can use narrower filters for decimation while interpolation reverses the order, and how aliasing and images are handled by later stages. Learn a simple rule to cut multipliers without sacrificing performance.
The DFT Output and Its Dimensions
The DFT gives N outputs for N samples, yet for real-valued signals most of those outputs are redundant. This post explains how conjugate symmetry organizes the output into a real DC bin, N/2-1 complex positive-frequency bins, a real Nyquist bin for even N, and then the conjugate mirror bins. A 64-point example illustrates which bins carry unique information and which can be discarded.
Amplitude modulation and the sampling theorem
Amplitude modulation turns out to be a neat way to build intuition for the Nyquist-Shannon sampling theorem. In this draft chapter from Think DSP, the author shows how multiplying by a carrier shifts spectra, why sampling creates repeated copies in frequency, and how low-pass filtering can recover the original signal when those copies do not overlap.
Exponential Smoothing with a Wrinkle
Cedron Dawg shows how pairing forward and backward exponential smoothing produces exact, frequency-dependent dampening for sinusoids while canceling time-domain lag. The average of the two passes scales the tone by a closed-form factor, and their difference acts like a first-derivative with a quarter-cycle phase shift. The post derives the analytic dampening formulas, compares them to the derivative, and includes a Python demo for DFT preprocessing.
Differentiating and integrating discrete signals
Think DSP's new chapter digs into discrete differentiation and integration, using first differences, convolution, and FFTs to compare time and frequency domain views. The author reproduces diff via convolution then explores cumsum as its inverse and runs into two puzzling mismatches: noisy FFT amplitude ratios for nonperiodic data, and a time-domain convolution that does not reproduce cumsum for a sawtooth despite matching frequency responses. The post includes IPython notebooks and invites troubleshooting.
Discrete-Time PLLs, Part 1: Basics
In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.
Compressive Sensing - Recovery of Sparse Signals (Part 1)
The amount of data that is generated has been increasing at a substantial rate since the beginning of the digital revolution. The constraints on the sampling and reconstruction of digital signals are derived from the well-known Nyquist-Shannon sampling theorem...
Summary of ROC Rules
This is a very short guide on how to find all possible outcomes of a system where Region of Convergence (ROC) and the original signal is not known.
Analytic Signal
In communication theory and modulation theory we always deal with two phases: In-phase (I) and Quadrature-phase (Q). The question that I will discuss in this blog is that why we use two phases and not more.
Controlling a DSP Network's Gain: A Note For DSP Beginners
Rick Lyons calls out a simple but costly mistake beginners make when normalizing digital networks, scaling the input instead of the output. Using fixed-point examples he shows that pre-multiplying an A/D output by 1/8 throws away bits and costs about 18 dB of SQNR. The practical guidance is to place gain control as the final multiplication stage and beware a faulty Simpson's 1/3 integrator example.
Half-band filter on Xilinx FPGA
Lyons Zhang shows a practical, high-throughput implementation of a symmetric systolic half-band FIR on Xilinx FPGAs using DSP48 slices. The post includes a two-channel interleaved downsample-by-2 Verilog module, pipeline mapping to DSP48, and a symmetric rounding trick to reduce the DC shift from truncation. It highlights performance-and-latency tradeoffs and gives working code you can drop into a Spartan-6 style flow.
How Not to Reduce DFT Leakage
Rick Lyons debunks a proposed 'data-flipping' fix for DFT spectral leakage, demonstrating with MATLAB that it can produce higher sidelobes and a troubling mainlobe dip for some input frequencies. He explains that windowing's goal is to reduce amplitude discontinuities in a periodic extension, not merely to force end samples to zero, and concludes the method is frequency-dependent and not recommended.
Unit Testing for Embedded Algorithms
Unit testing is a best practice for embedded algorithm development, and Anthony Ricke shows how to apply it to DSP code so host and target behave identically. He demonstrates writing unit tests, stubbing Blackfin fixed-point functions in the workstation, and using test-driven development to safely port and optimize an average-calculation example. The SourceForge examples make the approach practical to adopt.
Code Snippets Suggestions
The DSPRelated Code Snippet section is growing fast, but Stephane Boucher wants to accelerate it further with a new incentive. He is offering a one-time $20 payment for each of the next 100 submitted snippets, and he has also launched a page where readers can suggest the DSP code examples they want most. One lucky suggestion will win a copy of Notes on Digital Signal Processing.
Implementing Impractical Digital Filters
Some published IIR block diagrams are impossible to implement because they contain delay-less feedback paths, and Rick Lyons shows how simple algebra fixes that. He works through two concrete examples—a bandpass built from a FIR notch and a narrowband notch using a feedback loop—and derives equivalent, implementable second-order IIR transfer functions. The post emphasizes spotting problematic loops and replacing them with practical block diagrams.
New Comments System (please help me test it)
DSPRelated just got a practical upgrade, Stephane Boucher has released a new comments system built from his earlier forum work. It supports drag-and-drop or Insert Image uploads, MathML, TeX and ASCIImath rendered by MathJax, syntax-highlighted code via highlight.js, and in-place editing and deletion of comments. Improved email notifications alert authors and commenters to replies, and readers are invited to post test comments and report problems.
SEGGER's 25th Anniversary Video
Stephane Boucher spent a week at SEGGER's headquarters and distilled that visit into a tight, two-minute 25th anniversary video. The post highlights rising production value, thanks to softbox lighting and a two-camera setup that allows seamless wide-to-tight cuts and emotional close-ups. Stephane invites readers to watch full screen, leave feedback and thumbs-up on YouTube, and suggests future coverage like product launches or companies with happy engineers.
Above-Average Smoothing of Impulsive Noise
This post introduces a smoothing trick that behaves a lot like a moving average for high-frequency noise, but does a much better job of suppressing impulsive spikes. Rick Lyons shows how the corrected average is computed from the sample count, the sample imbalance around the mean, and the total deviation. He also compares the method against a standard moving average on a noisy step signal, where the improvement is easy to see.
Coupled-Form 2nd-Order IIR Resonators: A Contradiction Resolved
Rick Lyons resolves a long-standing confusion about the coupled-form 2nd-order IIR resonator by deriving its correct z-domain transfer function and explaining why textbooks can appear to contradict pole plots. He shows that with infinite precision the coupled and standard denominators match, but finite-bit quantization of rcos(Θ) and rsin(Θ) changes the z^-2 coefficient and shifts pole positions. Read to learn the correct H(z) to predict quantized behavior and when the coupled form outperforms the standard design.
Some Thoughts on Sampling
Sampling's 1/Ts amplitude factor is not a paradox but a consequence of axis scaling and impulse density, once you view the units correctly. This post walks through impulse trains in continuous and discrete time, uses DFT examples and Parseval's relation, and shows how downsampling and time scaling produce the familiar spectral replicas and their amplitudes. The geometry of the axes resolves the confusion.
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
This article demonstrates combining DSP and feedback-control on an Intel Cyclone floating-point FPGA to build low-latency closed-loop circuit emulators and controllers. Using a single floating-point biquad at 1.6 Msps, an IFFT multi-tone 4.096 ms capture for wideband measurement, and MATLAB references for verification, the author achieves sub-nanosecond timing insight and applies DSP phase compensation to cancel about 100 pF of PCB parasitics.
Model Signal Impairments at Complex Baseband
Neil Robertson presents compact complex-baseband channel models for common signal impairments, implemented as short Matlab functions of up to seven lines. Using QAM examples and constellation plots, he demonstrates how interfering carriers, two-path multipath, sinusoidal phase noise, and Gaussian noise distort constellations and affect MER. The examples are lightweight and practical, making it easy to test receiver diagnostics and prototype adaptive-equalizer scenarios.
The Little Fruit Market: The Beginning of the Digital Explosion
A small fruit market in Mountain View became an unlikely cradle for the modern electronics era. Rick Lyons recounts how William Shockley’s lab at 391 San Antonio prompted the Traitorous Eight to form Fairchild, seeding Silicon Valley and spawning an industry whose transistor production quickly dwarfed grains of rice. The post ties that history to the everyday ubiquity of semiconductor devices.
A brief look at multipath radio channels
Markus Nentwig walks through a hands-on RF experiment that makes multipath and fading visible using a network analyzer and simple dipole antennas. He shows how reflections produce frequency-domain notches when path differences equal half wavelengths, and how doubling distance increases free-space path loss by roughly 6 dB. The post explains why narrowband signals often see flat fading while wideband links become frequency-selective, motivating OFDM and multi-tap channel models.
A New Contender in the Quadrature Oscillator Race
Rick Lyons highlights a compact quadrature oscillator introduced by A. David Levine and Martin Vicanek, offering guaranteed stability, accurate low-frequency tuning, and modest computational cost. The post walks through the simple u, v, w recurrences used for software implementation. Appendices provide transfer functions and an algebraic stability proof for engineers who want formal verification before deployment.
Helping New Bloggers to Break the Ice: A New Ipad Pro for the Author with the Best Article!
Breaking the ice can be tough. Over the years, many individuals have asked to be given access to the blogging interface only to never post an article.
DSP Algorithm Implementation: A Comprehensive Approach
This post lays out a practical pathway for taking DSP algorithms from high level simulation to production hardware, comparing GPP, DSP, FPGA and ASIC platforms. It presents a stepwise methodology starting with nested loop programs, then exposing parallelism with data flow graphs, using SystemC transaction level modeling to bridge to Verilog or VHDL, and explains why that flow speeds design and simulation.
The Freshers Interview Guide
Hiring managers see the same avoidable mistakes from new grads, so Jeff offers blunt, practical advice to fix them. This short guide explains why honesty, solid debugging skills, and clear resumes matter more than cramming technical facts, and shows how to demonstrate problem-solving, organization, and teamwork in an interview to stand out as a reliable entry-level DSP or EE candidate.
Controlling a DSP Network's Gain: A Note For DSP Beginners
Rick Lyons calls out a simple but costly mistake beginners make when normalizing digital networks, scaling the input instead of the output. Using fixed-point examples he shows that pre-multiplying an A/D output by 1/8 throws away bits and costs about 18 dB of SQNR. The practical guidance is to place gain control as the final multiplication stage and beware a faulty Simpson's 1/3 integrator example.
