5G NR QC-LDPC Encoding Algorithm
Lyons Zhang breaks down the 5G NR QC-LDPC encoding structure, emphasizing the circulant permutation matrices and why QC-LDPC suits simple hardware. The post defines the Q(P) and Q(-1) notation, summarizes BG1 and BG2 dimensions and selection rules, and shows how the parity-check matrix is partitioned for practical encoder implementations.
Interpolation Basics
Neil Robertson demonstrates interpolation by an integer factor using a frequency-domain approach, showing how zero-insertion followed by an FIR low-pass filter reconstructs a higher-rate signal. The article walks through spectra, passband and stopband selection, and a 41-tap Parks-McClellan filter example applied to a Chebyshev-window test signal. Matlab code and percent-error plots are included so engineers can reproduce and evaluate the method.
A Two Bin Solution
Cedron Dawg shows how a real sinusoid's frequency, amplitude and phase can be recovered from only two adjacent DFT bins. The article derives exact two-bin formulas, gives a clear Gambas reference implementation, and demonstrates that accurate parameters can be obtained with very few samples when the tone lies between the bins. It also explains when the method breaks down and how the real-valued unfurling improves robustness.
Reduced-Delay IIR Filters
Rick Lyons investigates a simple 2nd-order IIR modification that reduces passband group delay by just under one sample, inspired by Steve Maslen's reduced-delay concept. He walks through the conversion steps and compares z-plane, magnitude, and group-delay plots for Butterworth, elliptic, and Chebyshev prototypes, showing how zeros shift and stopband attenuation degrades. A linked PDF extends the study to 1st-, 3rd-, and 4th-order cases so you can follow the tradeoffs.
Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
Negative-latency DSP can cancel ADC, FPGA/DSP, DAC and propagation delays to deliver near-zero unwanted latency filtering. Steve Maslen explains how to split a digital filter into a simple feed gain b0 and an advanced DF3 block that produces samples one sample early, then recombine them so sampled-data delays cancel. MATLAB c2d examples, a PID case study and FPGA test-bed results show the technique is practical and proven, with active IP noted.
A Direct Digital Synthesizer with Arbitrary Modulus
Need exact sampled tones on a coarse grid without a huge sine table? This post shows how to build a Direct Digital Synthesizer with an arbitrary modulus so the output frequency is exactly k·fs/L, using a look-up table as small as 20 entries for the 10 MHz/0.5 MHz-step example. It also explains fixed-point LUT rounding, accumulator bit sizing, and how to produce quadrature outputs when L is multiple of 4.
Somewhat Off Topic: Deciphering Transistor Terminology
Rick Lyons unpacks a small linguistic mystery in electronics, revealing why the transistor's middle terminal is called the "base". He traces the name to the 1949 Bell Labs "semiconductor triode", where the device sat on a metal base plate described as a large-area low-resistance contact, and notes that later transistor sandwich designs kept the name for historical reasons. The post includes original references and a few trivia nuggets.
Reducing IIR Filter Computational Workload
Rick Lyons demonstrates a simple, practical way to cut the multiply count for IIR lowpass and highpass filters by converting them into dual-path allpass structures. The conversion preserves the original magnitude response while drastically reducing multiplies per input sample, for example turning a 5th-order IIR that needs 11 multiplies into an equivalent allpass form needing only five. The linked PDF includes theory, implementation notes, a design example, and MATLAB code.
A Lesson In Engineering Humility
Rick Lyons revisits a remarkable 1948 Bell Labs project that implemented a 12-channel telephone PCM transmission system without using transistors. The original two-paper PDF shows how engineers converted analog audio into 7-bit serial pulse-code streams sampled at 8000 samples per second, and Lyons calls studying that work a true lesson in engineering humility. He places the papers alongside 1948 milestones such as Shannon's theory and early transistor developments.
IIR Bandpass Filters Using Cascaded Biquads
This post provides a Matlab function that builds Butterworth bandpass IIR filters by cascading second-order biquad sections. The biquad approach, implemented in Direct Form II, reduces sensitivity to coefficient quantization, which matters most for narrowband filters. The included biquad_bp function computes each section's feedforward and feedback coefficients plus gains from a lowpass prototype order, center frequency, bandwidth, and sampling rate.
Part 11. Using -ve Latency DSP to Cancel Unwanted Delays in Sampled-Data Filters/Controllers
Negative-latency DSP can cancel ADC, FPGA/DSP, DAC and propagation delays to deliver near-zero unwanted latency filtering. Steve Maslen explains how to split a digital filter into a simple feed gain b0 and an advanced DF3 block that produces samples one sample early, then recombine them so sampled-data delays cancel. MATLAB c2d examples, a PID case study and FPGA test-bed results show the technique is practical and proven, with active IP noted.
How precise is my measurement?
Precision is quantifiable, not guesswork. This post walks through practical, measurement-oriented statistics you can apply to static or dynamic signals to answer the question, "How precise is my measurement?" It focuses on using multiple samples, checking distribution assumptions, and constructing confidence intervals and levels so you can trade measurement time for a desired precision.
Going back to Germany!
A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons. I came back from the conference energized and really happy that I went.
These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...
Recruiting New Bloggers!
Previous calls for bloggers have been very successful in recruiting some great communicators - Rick Lyons, Jason Sachs, Victor Yurkovsky, Mike Silva, Markus Nentwig, Gene Breniman, Stephen Friederichs,
Phase and Amplitude Calculation for a Pure Real Tone in a DFT: Method 1
Cedron Dawg shows how to get exact amplitude and phase for a real sinusoid whose frequency does not land on an integer DFT bin. The method treats a small neighborhood of DFT bins as a complex vector, builds two basis vectors from the cosine and sine transforms, and solves a 2x2 system using conjugate dot products to recover real coefficients that give amplitude and phase. A C++ example and sample output verify the formulas.
How to Find a Fast Floating-Point atan2 Approximation
This post shows how a compact, fast atan2 can be built from a Remez-derived arctangent approximation and a matching 3rd-order polynomial. It walks through using Boost's remez_minimax to recover coefficients 0.97239411 and -0.19194795, integrating the polynomial into an atan2 with quadrant reduction, and applying branch reduction, bit tricks, and SSE2 SIMD to cut runtime while keeping max error under about 0.005 radians.
IIR Bandpass Filters Using Cascaded Biquads
This post provides a Matlab function that builds Butterworth bandpass IIR filters by cascading second-order biquad sections. The biquad approach, implemented in Direct Form II, reduces sensitivity to coefficient quantization, which matters most for narrowband filters. The included biquad_bp function computes each section's feedforward and feedback coefficients plus gains from a lowpass prototype order, center frequency, bandwidth, and sampling rate.
Design study: 1:64 interpolating pulse shaping FIR
Markus Nentwig presents a practical 1:64 root-raised cosine interpolator built from cascaded FIR stages that slashes computational cost. By separating pulse shaping from rate conversion, designing each interpolator to suppress only known alias bands, and equalizing the pulse shape, the design achieves just 4.69 MACs per output, roughly 12 percent of a straight polyphase implementation while meeting EVM targets.
Modeling Anti-Alias Filters
Modeling anti-alias filters brings textbook aliasing examples to life. This post shows how to build discrete-time models G(z) for analog Butterworth and Chebyshev lowpass anti-alias filters, compares bilinear transform and impulse invariance, and simulates ADC input/output including aliasing of sinusoids and Gaussian noise. It concludes that impulse invariance gives better stopband accuracy and includes Matlab helper functions.
The Discrete Fourier Transform and the Need for Window Functions
The FFT alone can mislead: capturing a finite-length signal with a rectangular window smears energy across frequency, producing spectral leakage that hides real components. This post explains the origin of leakage, shows how tapered windows such as the Hanning window suppress sidelobes, and demonstrates the tradeoff between sidelobe suppression and mainlobe widening while covering practical tips on zero-padding and record length.
TCP/IP interface (Matlab/Octave)
Markus Nentwig supplies a compact set of mex C functions that let you control Ethernet-enabled measurement instruments directly from Matlab or Octave on Windows. The code opens raw TCP/IP sockets, sends SCPI commands, and handles ASCII and binary replies including binary-length headers. It intentionally avoids instrument-control toolboxes and timeouts for simplicity, and includes instrIf_socket, instrIf_write, instrIf_read and instrIf_close with simple usage examples.
Discrete-Time PLLs, Part 1: Basics
In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.
Setting the 3-dB Cutoff Frequency of an Exponential Averager
Many engineers use a simple exponential averager but need the correct α to achieve a specified 3-dB cutoff. Rick Lyons compares a common approximation with the exact closed-form solution, shows when the approximation is valid, and derives the exact α in the appendix. The approximation works well for fc < 0.1fs, but it becomes noticeably inaccurate as the normalized cutoff increases.
Beat Notes: An Interesting Observation
Rick Lyons overturns a common intuition about beat notes, showing that adding two nearby audio tones yields an average-frequency tone whose amplitude fluctuates, rather than a separate low-frequency sinusoid. He contrasts multiplication and summation of sines, provides simple trigonometric insight, and includes Matlab audio demos to explain why aircraft engine "whump" sounds are amplitude fluctuations of the average engine frequency.
Spread the Word and Run a Chance to Win a Bundle of Goodies from Embedded World
Do you have a Twitter and/or Linkedin account?
If you do, please consider paying close attention for the next few days to the EmbeddedRelated Twitter account and to my personal Linkedin account (feel free to connect). This is where I will be posting lots of updates about how the EmbeddedRelated.tv live streaming experience is going at Embedded World.
The most successful this live broadcasting experience will be, the better the chances that I will be able to do it...
Ten Little Algorithms, Part 6: Green’s Theorem and Swept-Area Detection
Jason shows how Green's Theorem becomes a practical, low-cost method to detect real-time rotation from two orthogonal sensors by accumulating swept area. The post derives a compact discrete integrator S[n] = S[n-1] + (x[n]*(y[n]-y[n-1]) - y[n]*(x[n]-x[n-1]))/2, compares integer and floating implementations, and analyzes noise scaling and sampling rate tradeoffs. Includes Python demos and threshold guidance.
The DSP Online Conference - Right Around the Corner!
Three months after a forum post, Stephane Boucher and Jacob Beningo pulled together the DSP Online Conference, a two-day virtual event featuring 14 talks from leading DSP experts. Most sessions are 30 to 60 minutes with a 30-minute Zoom Q&A, while extended deep dives from speakers like fred harris are included. Registered attendees get one-year on-demand access, and free or reduced passes are available.
Using Mason's Rule to Analyze DSP Networks
When algebra gets messy, Rick Lyons shows how Mason's Rule cuts through the tedium to produce z-domain transfer functions for even nested-feedback DSP networks. The post gives a clear step-by-step procedure, definitions, and worked examples including a biquad, a DC-bias remover, and a complex multi-loop network. It also points to a public MATLAB routine to automate the bookkeeping.
Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Two jobs
Stephane Boucher explains why EmbeddedRelated went quiet for a few months after a volunteer project demanded more of his time. He and his wife organized a clown-gymnastics show with 15 kids, sold more than 700 of 800 tickets, and raised $2,700 for the Tree of Hope. Now the shows are done and he plans to resume regular posting with new site features.
