Project Report : Digital Filter Blocks in MyHDL and their integration in pyFDA
The Google Summer of Code 2018 is now in its final stages, and I’d like to take a moment to look back at what goals were accomplished, what remains to be completed and what I have learnt.
The project overview was discussed in the previous blog posts. However this post serves as a guide to anyone who wishes to learn about the project or carry it forward. Hence I will go over the project details again.
Project overviewThe project “Digital Filter Blocks in MyHDL and PyFDA integration" aims...
Sensors Expo - Trip Report & My Best Video Yet!
This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.
Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip. If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Off Topic: Refraction in a Varying Medium
IntroductionThis article is another digression from a better understanding of the DFT. In fact, it is a digression from DSP altogether. However, since many of the readers here are Electrical Engineers and other folks who are very scientifically minded, I hope this article is of interest. A differential vector equation is derived for the trajectory of a point particle in a field of varying index of refraction. This applies to light, of course, but since it is a purely theoretical...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
Project update-2 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This is an exciting update in the sense that it demonstrates a working model of one important aspect of the project: The integration or ‘glue’ between and Pyfda and MyHDL filter blocks.
So, why do we need to integrate and how do we go about it?
As discussed in earlier posts, the idea is to provide a workflow in Pyfda that automates the process of Implementing a fixpoint filter in VHDL / Verilog, and verify the correct performance in a digital design environment. MyHDL based...
Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA
This blog post presents the progress made up to week 5 in my GSoC project “Digital Filter blocks and their integration in PyFDA”. Progress was made in two areas of the project.
This post will primarily discuss filter block implementation. The interface will be discussed in a later post once further progress is made.
Direct form-I FIR filterThe equation specifies the direct form I...
Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction
Last time, we talked about error correction and detection, covering some basics like Hamming distance, CRCs, and Hamming codes. If you are new to this topic, I would strongly suggest going back to read that article before this one.
This time we are going to cover Reed-Solomon codes. (I had meant to cover this topic in Part XV, but the article was getting to be too long, so I’ve split it roughly in half.) These are one of the workhorses of error-correction, and they are used in...
Linear Feedback Shift Registers for the Uninitiated, Part XV: Error Detection and Correction
Last time, we talked about Gold codes, a specially-constructed set of pseudorandom bit sequences (PRBS) with low mutual cross-correlation, which are used in many spread-spectrum communications systems, including the Global Positioning System.
This time we are wading into the field of error detection and correction, in particular CRCs and Hamming codes.
Ernie, You Have a Banana in Your EarI have had a really really tough time writing this article. I like the...
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.
I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...
Digital PLL’s, Part 3 – Phase Lock an NCO to an External Clock
Sometimes you may need to phase-lock a numerically controlled oscillator (NCO) to an external clock that is not related to the system clocks of your ASIC or FPGA. This situation is shown in Figure 1. Assuming your system has an analog-to-digital converter (ADC) available, you can sync to the external clock using the scheme shown in Figure 2. This time-domain PLL model is similar to the one presented in Part 1 of this series on digital PLL’s [1]. In that PLL, we...
Why Time-Domain Zero Stuffing Produces Multiple Frequency-Domain Spectral Images
This blog explains why, in the process of time-domain interpolation (sample rate increase), zero stuffing a time sequence with zero-valued samples produces an increased-length time sequence whose spectrum contains replications of the original time sequence's spectrum.
Background
The traditional way to interpolate (sample rate increase) an x(n) time domain sequence is shown in Figure 1.
Figure 1
The '↑ L' operation in Figure 1 means to...
Wavelets II - Vanishing Moments and Spectral Factorization
In the previous blog post I described the workings of the Fast Wavelet Transform (FWT) and how wavelets and filters are related. As promised, in this article we will see how to construct useful filters. Concretely, we will find a way to calculate the Daubechies filters, named after Ingrid Daubechies, who invented them and also laid much of the mathematical foundations for wavelet analysis.
Besides the content of the last post, you should be familiar with basic complex algebra, the...
Overview of my Articles
IntroductionThis article is a summary of all the articles I've written here at DspRelated. The main focus has always been an increased understanding of the Discrete Fourier Transform (DFT). The references are grouped by topic and ordered in a reasonable reading order. All the articles are meant to teach math, or give examples of math, in context within a specific application. Many of the articles also have sample programs which demonstrate the equations derived in the articles. My...
DFT Bin Value Formulas for Pure Real Tones
IntroductionThis is an article to hopefully give a better understanding to the Discrete Fourier Transform (DFT) by deriving an analytical formula for the DFT of pure real tones. The formula is used to explain the well known properties of the DFT. A sample program is included, with its output, to numerically demonstrate the veracity of the formula. This article builds on the ideas developed in my previous two blog articles:
60-Hz Noise and Baseline Drift Reduction in ECG Signal Processing
Electrocardiogram (ECG) signals are obtained by monitoring the electrical activity of the human heart for medical diagnostic purposes [1]. This blog describes a very efficient digital filter used to reduce both 60 Hz AC power line noise and unwanted signal baseline drift that often contaminate ECG signals.
PDF_HERE
We'll first describe the ECG noise reduction filter and then examine the filter's performance in a real-world ECG signal filtering example.Proposed ECG Noise Reduction Digital...
Phase and Amplitude Calculation for a Pure Real Tone in a DFT: Method 1
IntroductionThis is an article to hopefully give a better understanding of the Discrete Fourier Transform (DFT) by deriving exact formulas for the phase and amplitude of a non-integer frequency real tone in a DFT. The linearity of the Fourier Transform is exploited to reframe the problem as the equivalent of finding a set of coordinates in a specific vector space. The found coordinates are then used to calculate the phase and amplitude of the pure real tone in the DFT. This article...
Modeling Anti-Alias Filters
Digitizing a signal using an Analog to Digital Converter (ADC) usually requires an anti-alias filter, as shown in Figure 1a. In this post, we’ll develop models of lowpass Butterworth and Chebyshev anti-alias filters, and compute the time domain and frequency domain output of the ADC for an example input signal. We’ll also model aliasing of Gaussian noise. I hope the examples make the textbook explanations of aliasing seem a little more real. Of course, modeling of...
The DFT Output and Its Dimensions
The Discrete Fourier Transform, or DFT, converts a signal from discrete time to discrete frequency. It is commonly implemented as and used as the Fast Fourier Transform (FFT). This article will attempt to clarify the format of the DFT output and how it is produced.
Living in the real world, we deal with real signals. The data we typically sample does not have an imaginary component. For example, the voltage sampled by a receiver is a real value at a particular point in time. Let’s...
A New Contender in the Digital Differentiator Race
This blog proposes a novel differentiator worth your consideration. Although simple, the differentiator provides a fairly wide 'frequency range of linear operation' and can be implemented, if need be, without performing numerical multiplications.
BackgroundIn reference [1] I presented a computationally-efficient tapped-delay line digital differentiator whose $h_{ref}(k)$ impulse response is:
$$ h_{ref}(k) = {-1/16}, \ 0, \ 1, \ 0, \ {-1}, \ 0, \ 1/16 \tag{1} $$and...
The DFT Output and Its Dimensions
The Discrete Fourier Transform, or DFT, converts a signal from discrete time to discrete frequency. It is commonly implemented as and used as the Fast Fourier Transform (FFT). This article will attempt to clarify the format of the DFT output and how it is produced.
Living in the real world, we deal with real signals. The data we typically sample does not have an imaginary component. For example, the voltage sampled by a receiver is a real value at a particular point in time. Let’s...
Using the DFT as a Filter: Correcting a Misconception
I have read, in some of the literature of DSP, that when the discrete Fourier transform (DFT) is used as a filter the process of performing a DFT causes an input signal's spectrum to be frequency translated down to zero Hz (DC). I can understand why someone might say that, but I challenge that statement as being incorrect. Here are my thoughts.
Using the DFT as a Filter It may seem strange to think of the DFT as being used as a filter but there are a number of applications where this is...
Python scipy.signal IIR Filter Design Cont.
In the previous post the Python scipy.signal iirdesign function was disected. We reviewed the basics of filter specification and reviewed how to use the iirdesign function to design IIR filters. The previous post I only demonstrated low pass filter designs. The following are examples how to use the iirdesign function for highpass, bandpass, and stopband filters designs.
Highpass FilterThe following is a highpass filter design for the different filter...
Fractional Delay FIR Filters
Consider the following Finite Impulse Response (FIR) coefficients:
b = [b0 b1 b2 b1 b0]
These coefficients form a 5-tap symmetrical FIR filter having constant group delay [1,2] over 0 to fs/2 of:
D = (ntaps – 1)/2 = 2 samples
For a symmetrical filter with an odd number of taps, the group delay is always an integer number of samples, while for one with an even number of taps, the group delay is always an integer + 0.5 samples. Can we design a filter...
Waveforms that are their own Fourier Transform
Mea Culpa
There are many scary things about writing a technical book. Can I make the concepts clear? It is worth the effort? Will it sell? But all of these pale compared to the biggest fear: What if I'm just plain wrong? Not being able to help someone is one thing, but leading them astray is far worse.
My book on DSP has now been published for almost ten years. I've found lots of typos, a few misstatements, and many places where the explanations confuse even me. But I have been lucky;...
Understanding Radio Frequency Distortion
OverviewThe topic of this article are the effects of radio frequency distortions on a baseband signal, and how to model them at baseband. Typical applications are use as a simulation model or in digital predistortion algorithms.
IntroductionTransmitting and receiving wireless signals usually involves analog radio frequency circuits, such as power amplifiers in a transmitter or low-noise amplifiers in a receiver.Signal distortion in those circuits deteriorates the link quality. When...
Shared-multiplier polyphase FIR filter
Keywords: FPGA, interpolating decimating FIR filter, sample rate conversion, shared multiplexed pipelined multiplier
Discussion, working code (parametrized Verilog) and Matlab reference design for a FIR polyphase resampler with arbitrary interpolation and decimation ratio, mapped to one multiplier and RAM.
IntroductionA polyphase filter can be as straightforward as multirate DSP ever gets, if it doesn't turn into a semi-deterministic, three-legged little dance between input, output and...
Design of an anti-aliasing filter for a DAC
Overview- Octaveforge / Matlab design script. Download: here
- weighted numerical optimization of Laplace-domain transfer function
- linear-phase design, optimizes vector error (magnitude and phase)
- design process calculates and corrects group delay internally
- includes sinc() response of the sample-and-hold stage in the ADC
- optionally includes multiplierless FIR filter
Digital-to-analog conversion connects digital...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Instantaneous Frequency Measurement
I would like to talk about the oft used method of measuring the carrier frequency in the world of Signal Collection and Characterization world. It is an elegant technique because of its simplicity. But, of course, with simplicity, there come drawbacks (sometimes...especially with this one!).
In the world of Radar detection and characterization, one of the key characteristics of interest is the carrier frequency of the signal. If the radar is pulsed, you will have a very wide bandwidth, a...